# `add`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/add

**Addition**

Category: Arithmetic

Adds the second and third registers and stores the sum in the first.

[RISC-V manual: add](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:add_op)

Used in: [The RISC-V instruction set](https://asm-editor.specy.app/learn/courses/risc-v/introduction/the-risc-v-instruction-set.md) (RISC-V assembly), [Loads, stores and immediates](https://asm-editor.specy.app/learn/courses/risc-v/introduction/loads-stores-and-immediates.md) (RISC-V assembly), [Going 64-bit](https://asm-editor.specy.app/learn/courses/risc-v/introduction/going-64-bit.md) (RISC-V assembly), [if, else and jump tables](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/if-else-and-jump-tables.md) (RISC-V assembly), [Loops](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/loops.md) (RISC-V assembly), [Arithmetic, logic and bits](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/arithmetic-logic-and-bits.md) (RISC-V assembly), [Arrays and strings](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/arrays-and-strings.md) (RISC-V assembly), [The stack and sp](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/the-stack-and-sp.md) (RISC-V assembly), [jal, ret and the calling convention](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/jal-ret-and-the-calling-convention.md) (RISC-V assembly), [ecall](https://asm-editor.specy.app/learn/courses/risc-v/talking-to-the-outside-world/ecall.md) (RISC-V assembly)

## Forms

- `add t1, t2, t3`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.
- `t3`: An integer register. It may be the same register as `t1`.

## Example

```riscv
.text
li t0, 13
li t1, 5
# t0=13, t1=5; add writes 18 to t2.
add t2, t0, t1
```