# `bgt`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/bgt

**Branch if greater than** · Pseudo-instruction

Category: Control flow

Branches to label if the first register is greater than the second, comparing as signed.

[RISC-V manual: blt](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:blt_bltu_op)

Used in: [Loops](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/loops.md) (RISC-V assembly), [Arrays and strings](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/arrays-and-strings.md) (RISC-V assembly), [Binary search](https://asm-editor.specy.app/learn/courses/risc-v/examples/binary-search.md) (RISC-V assembly), [The snake game](https://asm-editor.specy.app/learn/courses/risc-v/examples/snake.md) (RISC-V assembly), [Flappy ASM](https://asm-editor.specy.app/learn/courses/risc-v/examples/flappy-asm.md) (RISC-V assembly)

## Forms

- `bgt t1, t2, label`
  - `bgt t1,t2,label` → `blt t2, t1, label`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.
- `label`: A named address in the program, such as the start of a loop or a variable in `.data`.

## Example

```riscv
# First bgt case is taken; second is not. t2 ends at 11 (10 + 1).
.text
li t2, 0
li t0, 7
li t1, 3
bgt t0, t1, taken
addi t2, t2, 1
j first_done # Skip the other marker unconditionally.
taken:
addi t2, t2, 10
first_done:
li t0, 3
li t1, 7
bgt t0, t1, missed
addi t2, t2, 1
j second_done # Skip the other marker unconditionally.
missed:
addi t2, t2, 10
second_done:
# t2=11 proves one taken and one untaken path.
```