# `frcsr`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/frcsr

**Read FP CSR** · Pseudo-instruction

Category: Floating point

Reads the FP control and status register (fcsr) into a register.

Also written as: `frsr`

[RISC-V manual: csrrs](https://docs.riscv.org/reference/isa/v20260120/unpriv/zicsr.html#norm:csrrs_op)

## Forms

- `frcsr t1`
  - `frcsr t1` → `csrrs t1, fcsr, zero`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.

## Example

```riscv
# Initialize fcsr, then use frcsr to read its old value or update it.
.text
li t3, 0
csrw t3, fcsr
frcsr t1
# t1=0 because fcsr was cleared immediately above.
```