# `fscsr`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/fscsr

**Swap FP CSR** · Pseudo-instruction

Category: Floating point

Swaps the second register into the FP control and status register, storing its old value in the first, or, when given one register, only writes that register.

Also written as: `fssr`

[RISC-V manual: csrrw](https://docs.riscv.org/reference/isa/v20260120/unpriv/zicsr.html#norm:csrrw_op)

## Forms

- `fscsr t1, t2`
  - `fscsr t1, t2` → `csrrw t1, fcsr, t2`

- `fscsr t1` · Write FP control/status register
  - `fscsr t1` → `csrrw zero, fcsr, t1`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.

## Example

```riscv
# Initialize fcsr, then use fscsr to read its old value or update it.
.text
li t3, 0
csrw t3, fcsr
li t0, 1
fscsr t1, t0
# t1=0 is the old value; fcsr becomes 1.
```