# `jalr`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/jalr

**Jump and link register**

Category: Control flow

Saves the return address in the first register and jumps to the address in the second plus an offset, or with one register links through ra.

[RISC-V manual: jalr](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:jalr_op)

## Forms

- `jalr t1, t2, imm12`

## Pseudo-instructions

The processor does not have these forms. The assembler replaces each of them with one or more real instructions. Open a row to see them.

Jump to address in t0 and set the return address to ra

- `jalr t0`
  - `jalr t0` → `jalr ra, t0, 0`
- `jalr t0, imm12`
  - `jalr t0, -100` → `jalr ra, t0, imm12`

- `jalr t0, imm12(t1)` · Jump to address in t1 and set the return address to t0
  - `jalr t0,-100(t1)` → `jalr t0, t1, imm12`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.
- `imm12`: A signed 12-bit immediate, `-2048` to `2047`.
- `t0`: An integer register. It may be the same register as `t1`.

## Example

```riscv
# jalr saves the next instruction address (0x00400010) in ra. link_marker is that skipped instruction; t2 ends at 1.
.text
li t2, 0
la t3, done
jalr ra, 0(t3)
link_marker:
addi t2, t2, 100
done:
addi t2, t2, 1
```