# `not`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/not

**Bitwise NOT (bit inversion)** · Pseudo-instruction

Category: Logic

Sets the first register to the bitwise NOT of the second, flipping every bit.

[RISC-V manual: xori](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:andi_ori_xori_op)

Used in: [Arithmetic, logic and bits](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/arithmetic-logic-and-bits.md) (RISC-V assembly)

## Forms

- `not t1, t2`
  - `not t1,t2` → `xori t1, t2, -1`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.

## Example

```riscv
.text
li t0, 13
# t0=13; not writes -14 (0xFFFFFFF2) to t2.
not t2, t0
```