# `sh`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/sh

**Store halfword**

Category: Load and store

Stores the low 16 bits of the first register at the address in the second plus an offset.

[RISC-V manual: sh](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:sw_sh_sb_op)

Used in: [ecall](https://asm-editor.specy.app/learn/courses/risc-v/talking-to-the-outside-world/ecall.md) (RISC-V assembly), [Chiptune](https://asm-editor.specy.app/learn/courses/risc-v/examples/chiptune.md) (RISC-V assembly), [Sampled sound](https://asm-editor.specy.app/learn/courses/risc-v/examples/sampled-sound.md) (RISC-V assembly)

## Forms

- `sh t1, imm12(t2)`

## Pseudo-instructions

The processor does not have these forms. The assembler replaces each of them with one or more real instructions. Open a row to see them.

- `sh t1, (t2)` · Store the low-order 16 bits of $1 into the effective memory halfword address
  - `sh t1,(t2)` → `sh t1, 0(t2)`

- `sh t1, imm12` · Store the low-order 16 bits of $t1 into the effective memory halfword address
  - `sh t1,-100` → `sh t1, imm12(zero)`

Store the low-order 16 bits of t1 into the effective memory halfword address using t2 as a temporary

- `sh t1, imm32, t2`
  - `sh t1,10000000,t2` → `lui t2, hi(imm32)`; `sh t1, lo(imm32)(t2)`
- `sh t1, label, t2`
  - `sh t1,label,t2` → `auipc t2, pcrel_hi(label)`; `sh t1, pcrel_lo(label)(t2)`

- `sh t1, %lo(label)(t2)` · Store to Address
  - `sh t1,%lo(label)(t2)` → `sh t1, lo(label)(t2)`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `imm12`: A signed 12-bit immediate, `-2048` to `2047`.
- `t2`: An integer register. It may be the same register as `t1`.
- `imm32`: A 32-bit immediate, `-2147483648` to `4294967295`.
- `label`: A named address in the program, such as the start of a loop or a variable in `.data`.

## Example

```riscv
# value is initialized and naturally aligned for this operation.
.data
value: .word 0
.text
la t0, value
li t1, 42
# Store 42 (bytes 2A 00) at value; inspect Memory.
sh t1, 0(t0)
```