# `sll`

[RISC-V Documentation](https://asm-editor.specy.app/documentation/risc-v.md) › [Instructions](https://asm-editor.specy.app/documentation/risc-v/instruction.md)

Web page: https://asm-editor.specy.app/documentation/risc-v/instruction/sll

**Shift left logical**

Category: Shifts and rotates

Shifts the second register left by the amount in the low 5 bits of the third (6 on RV64) and stores the result in the first.

[RISC-V manual: sll](https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html#norm:sll_srl_sra_op)

Used in: [Arithmetic, logic and bits](https://asm-editor.specy.app/learn/courses/risc-v/think-in-assembly/arithmetic-logic-and-bits.md) (RISC-V assembly)

## Forms

- `sll t1, t2, t3`

## Operands

- `t1`: Any integer register, `x0` to `x31`, or its named alias, such as `zero`, `t0` or `t6`.
- `t2`: An integer register. It may be the same register as `t1`.
- `t3`: An integer register. It may be the same register as `t1`.

## Example

```riscv
.text
li t0, 13
li t1, 2
# t0=13, t1=2; sll writes 52 to t2.
sll t2, t0, t1
```