# `and`

[Z80 Documentation](https://asm-editor.specy.app/documentation/z80.md) › [Instructions](https://asm-editor.specy.app/documentation/z80/instruction.md)

Web page: https://asm-editor.specy.app/documentation/z80/instruction/and

**Logical AND**

Category: Logic

Sets A to the bitwise AND of A and a register, memory byte or immediate value.

Used in: [8-bit and 16-bit arithmetic, logic and bits](https://asm-editor.specy.app/learn/courses/z80/think-in-assembly/arithmetic-logic-and-bits.md) (Z80 assembly), [Even or odd, count the set bits, multiply by shifting](https://asm-editor.specy.app/learn/courses/z80/examples/bit-tricks.md) (Z80 assembly), [The snake game](https://asm-editor.specy.app/learn/courses/z80/examples/snake.md) (Z80 assembly), [Flappy bird](https://asm-editor.specy.app/learn/courses/z80/examples/flappy-bird.md) (Z80 assembly), [Chiptune](https://asm-editor.specy.app/learn/courses/z80/examples/chiptune.md) (Z80 assembly)

## Flags

| Flag | Effect |
| --- | --- |
| S | set from the result |
| Z | set from the result |
| H | always 1 |
| P/V | holds the parity of the result |
| N | always 0 |
| C | always 0 |

## Forms

- `and r` · 1 byte · 4 cycles · Bitwise AND on A with `r`.
  - `and b`
  - `and c`
  - `and d`
  - `and e`
  - `and h`
  - `and l`
  - `and a`

- `and (hl)` · 1 byte · 7 cycles · Bitwise AND on A with (HL).

- `and nn` · 2 bytes · 7 cycles · Bitwise AND on A with `nn`.

- `and (ix+dd)` · 3 bytes · 19 cycles · Bitwise AND on A with the value pointed to by IX plus `dd`.
  - `and (ix+dd)`
  - `and (iy+dd)`

## Pseudo-instructions

Other spellings the assembler accepts; each form shows the instruction it becomes.

- `and a, r` · 1 byte · 4 cycles · Bitwise AND on A with `r`.
  - `and a, b` → `and b`
  - `and a, c` → `and c`
  - `and a, d` → `and d`
  - `and a, e` → `and e`
  - `and a, h` → `and h`
  - `and a, l` → `and l`
  - `and a, a` → `and a`

- `and a, (hl)` · 1 byte · 7 cycles · Bitwise AND on A with (HL).
  - `and a, (hl)` → `and (hl)`

- `and a, nn` · 2 bytes · 7 cycles · Bitwise AND on A with `nn`.
  - `and a, nn` → `and nn`

- `and a, (ix+dd)` · 3 bytes · 19 cycles · Bitwise AND on A with the value pointed to by IX plus `dd`.
  - `and a, (ix+dd)` → `and (ix+dd)`
  - `and a, (iy+dd)` → `and (iy+dd)`

## Undocumented

Left out of Zilog's manual, but the Z80 runs them, and so does this emulator.

- `and ixh/l` · 2 bytes · 8 cycles · Bitwise AND on A with `ixh/l`.
  - `and ixh`
  - `and ixl`
  - `and iyh`
  - `and iyl`

## Pseudo-instructions · Undocumented

Other spellings the assembler accepts; each form shows the instruction it becomes. Left out of Zilog's manual, but the Z80 runs them, and so does this emulator.

- `and a, ixh/l` · 2 bytes · 8 cycles · Bitwise AND on A with `ixh/l`.
  - `and a, ixh` → `and ixh`
  - `and a, ixl` → `and ixl`
  - `and a, iyh` → `and iyh`
  - `and a, iyl` → `and iyl`

## Operands

- `r`: An 8-bit register: `a`, `b`, `c`, `d`, `e`, `h` or `l`.
- [`(hl)`](https://asm-editor.specy.app/documentation/z80/registers/operand-hl.md): The byte in memory at the address stored in `hl`.
- [`nn`](https://asm-editor.specy.app/documentation/z80/registers/operand-nn.md): An 8-bit immediate value, `0` to `255` or `-128` to `127`, written as a number, character constant or symbol.
- [`(ix+dd)`](https://asm-editor.specy.app/documentation/z80/registers/operand-ix-dd.md): The byte in memory at `ix + dd`, where `dd` is a signed displacement from `-128` to `127`, for example `(ix+5)` or `(ix-3)`. `(iy+dd)` works the same way.
- [`ixh/l`](https://asm-editor.specy.app/documentation/z80/registers/register-ixh.md): The high or low byte of `ix`: `ixh` or `ixl`. For `iy`, use `iyh` or `iyl`.

## Example

```z80
        .org 0x8000
        ld a, 5
        ld b, 3
        and b
        halt
```