# `ld`

[Z80 Documentation](https://asm-editor.specy.app/documentation/z80.md) › [Instructions](https://asm-editor.specy.app/documentation/z80/instruction.md)

Web page: https://asm-editor.specy.app/documentation/z80/instruction/ld

**Load**

Category: Data movement

Copies a value between registers, memory and immediate data, 8 or 16 bits at a time.

Used in: [Getting started with the Z80](https://asm-editor.specy.app/learn/courses/z80/introduction/getting-started.md) (Z80 assembly), [Registers, pairs and the shadow set](https://asm-editor.specy.app/learn/courses/z80/introduction/registers-pairs-and-the-shadow-set.md) (Z80 assembly), [The 64 KB address space](https://asm-editor.specy.app/learn/courses/z80/introduction/the-64-kb-address-space.md) (Z80 assembly), [org, db, dw and ds](https://asm-editor.specy.app/learn/courses/z80/introduction/org-db-dw-and-ds.md) (Z80 assembly), [Bytes and 16-bit pairs](https://asm-editor.specy.app/learn/courses/z80/introduction/bytes-and-16-bit-pairs.md) (Z80 assembly), [The Z80 instruction set](https://asm-editor.specy.app/learn/courses/z80/introduction/the-z80-instruction-set.md) (Z80 assembly), [Addressing on the Z80](https://asm-editor.specy.app/learn/courses/z80/introduction/addressing-on-the-z80.md) (Z80 assembly), [The F register](https://asm-editor.specy.app/learn/courses/z80/introduction/the-f-register.md) (Z80 assembly), [Memory regions and executable files](https://asm-editor.specy.app/learn/courses/z80/introduction/memory-regions-and-executable-files.md) (Z80 assembly), [jp, jr and the conditions](https://asm-editor.specy.app/learn/courses/z80/think-in-assembly/jp-jr-and-the-conditions.md) (Z80 assembly)

## Flags

| Flag | Effect |
| --- | --- |
| S | not changed |
| Z | not changed |
| H | not changed |
| P/V | not changed |
| N | not changed |
| C | not changed |

## Forms

- `ld r, r'` · 1 byte · 4 cycles · The contents of `r'` are loaded into `r`.
  - `ld b, b`
  - `ld b, c`
  - `ld b, d`
  - `ld b, e`
  - `ld b, h`
  - `ld b, l`
  - `ld b, a`
  - `ld c, b`
  - `ld c, c`
  - `ld c, d`
  - `ld c, e`
  - `ld c, h`
  - `ld c, l`
  - `ld c, a`
  - `ld d, b`
  - `ld d, c`
  - `ld d, d`
  - `ld d, e`
  - `ld d, h`
  - `ld d, l`
  - `ld d, a`
  - `ld e, b`
  - `ld e, c`
  - `ld e, d`
  - `ld e, e`
  - `ld e, h`
  - `ld e, l`
  - `ld e, a`
  - `ld h, b`
  - `ld h, c`
  - `ld h, d`
  - `ld h, e`
  - `ld h, h`
  - `ld h, l`
  - `ld h, a`
  - `ld l, b`
  - `ld l, c`
  - `ld l, d`
  - `ld l, e`
  - `ld l, h`
  - `ld l, l`
  - `ld l, a`
  - `ld a, b`
  - `ld a, c`
  - `ld a, d`
  - `ld a, e`
  - `ld a, h`
  - `ld a, l`
  - `ld a, a`

- `ld r, nn` · 2 bytes · 7 cycles · Loads `nn` into `r`.
  - `ld b, nn`
  - `ld c, nn`
  - `ld d, nn`
  - `ld e, nn`
  - `ld h, nn`
  - `ld l, nn`
  - `ld a, nn`

- `ld r, (hl)` · 1 byte · 7 cycles · The contents of (HL) are loaded into `r`.
  - `ld b, (hl)`
  - `ld c, (hl)`
  - `ld d, (hl)`
  - `ld e, (hl)`
  - `ld h, (hl)`
  - `ld l, (hl)`
  - `ld a, (hl)`

- `ld r, (ix+dd)` · 3 bytes · 19 cycles · Loads the value pointed to by IX plus `dd` into `r`.
  - `ld b, (ix+dd)`
  - `ld c, (ix+dd)`
  - `ld d, (ix+dd)`
  - `ld e, (ix+dd)`
  - `ld h, (ix+dd)`
  - `ld l, (ix+dd)`
  - `ld a, (ix+dd)`
  - `ld b, (iy+dd)`
  - `ld c, (iy+dd)`
  - `ld d, (iy+dd)`
  - `ld e, (iy+dd)`
  - `ld h, (iy+dd)`
  - `ld l, (iy+dd)`
  - `ld a, (iy+dd)`

- `ld (hl), r` · 1 byte · 7 cycles · The contents of `r` are loaded into (HL).
  - `ld (hl), b`
  - `ld (hl), c`
  - `ld (hl), d`
  - `ld (hl), e`
  - `ld (hl), h`
  - `ld (hl), l`
  - `ld (hl), a`

- `ld (ix+dd), r` · 3 bytes · 19 cycles · Stores `r` to the memory location pointed to by IX plus `dd`.
  - `ld (ix+dd), b`
  - `ld (ix+dd), c`
  - `ld (ix+dd), d`
  - `ld (ix+dd), e`
  - `ld (ix+dd), h`
  - `ld (ix+dd), l`
  - `ld (ix+dd), a`
  - `ld (iy+dd), b`
  - `ld (iy+dd), c`
  - `ld (iy+dd), d`
  - `ld (iy+dd), e`
  - `ld (iy+dd), h`
  - `ld (iy+dd), l`
  - `ld (iy+dd), a`

- `ld (hl), nn` · 2 bytes · 10 cycles · Loads `nn` into (HL).

- `ld (ix+dd), nn` · 4 bytes · 19 cycles · Stores `nn` to the memory location pointed to by IX plus `dd`.
  - `ld (ix+dd), nn`
  - `ld (iy+dd), nn`

- `ld a, (bc)` · 1 byte · 7 cycles · Loads the value pointed to by BC into A.

- `ld a, (de)` · 1 byte · 7 cycles · Loads the value pointed to by DE into A.

- `ld a, (nnnn)` · 3 bytes · 13 cycles · Loads the value pointed to by `nnnn` into A.

- `ld (bc), a` · 1 byte · 7 cycles · Stores A into the memory location pointed to by BC.

- `ld (de), a` · 1 byte · 7 cycles · Stores A into the memory location pointed to by DE.

- `ld (nnnn), a` · 3 bytes · 13 cycles · Stores A into the memory location pointed to by `nnnn`.

- `ld a, i` · 2 bytes · 9 cycles · Flags: S: set from the result, Z: set from the result, H: always 0, P/V: changed in a way of its own, as the form says, N: always 0, C: not changed · Stores the value of register I into A.

- `ld a, r` · 2 bytes · 9 cycles · Flags: S: set from the result, Z: set from the result, H: always 0, P/V: changed in a way of its own, as the form says, N: always 0, C: not changed · Stores the value of register R into A.

- `ld i, a` · 2 bytes · 9 cycles · Stores the value of A into register I.

- `ld r, a` · 2 bytes · 9 cycles · Stores the value of A into register R.

- `ld rr, nnnn` · 3 bytes · 10 cycles · Loads `nnnn` into `rr`.
  - `ld bc, nnnn`
  - `ld de, nnnn`
  - `ld hl, nnnn`
  - `ld sp, nnnn`

- `ld ix, nnnn` · 4 bytes · 14 cycles · Loads `nnnn` into register IX.
  - `ld ix, nnnn`
  - `ld iy, nnnn`

- `ld hl, (nnnn)` · 3 bytes · 16 cycles · Loads the value pointed to by `nnnn` into HL.

- `ld rr, (nnnn)` · 4 bytes · 20 cycles · rr: bc de sp · Loads the value pointed to by `nnnn` into `rr`.
  - `ld bc, (nnnn)`
  - `ld de, (nnnn)`
  - `ld sp, (nnnn)`

- `ld ix, (nnnn)` · 4 bytes · 20 cycles · Loads the value pointed to by `nnnn` into IX.
  - `ld ix, (nnnn)`
  - `ld iy, (nnnn)`

- `ld (nnnn), hl` · 3 bytes · 16 cycles · Stores HL into the memory location pointed to by `nnnn`.

- `ld (nnnn), rr` · 4 bytes · 20 cycles · rr: bc de sp · Stores `rr` into the memory location pointed to by `nnnn`.
  - `ld (nnnn), bc`
  - `ld (nnnn), de`
  - `ld (nnnn), sp`

- `ld (nnnn), ix` · 4 bytes · 20 cycles · Stores IX into the memory location pointed to by `nnnn`.
  - `ld (nnnn), ix`
  - `ld (nnnn), iy`

- `ld sp, hl` · 1 byte · 6 cycles · Loads the value of HL into SP.

- `ld sp, ix` · 2 bytes · 10 cycles · Loads the value of IX into SP.
  - `ld sp, ix`
  - `ld sp, iy`

## Pseudo-instructions

Other spellings the assembler accepts; each form shows the instruction it becomes.

- `ld rr, rr'` · 2 bytes · 8 cycles · rr: bc de hl · rr': bc de hl · The contents of `rr'` are loaded into `rr`.
  - `ld bc, hl` → `ld b, h`; `ld c, l`
  - `ld de, bc` → `ld d, b`; `ld e, c`
  - `ld de, hl` → `ld d, h`; `ld e, l`
  - `ld hl, bc` → `ld h, b`; `ld l, c`
  - `ld hl, de` → `ld h, d`; `ld l, e`

- `ld bc, (hl)` · 4 bytes · 26 cycles · The contents of (HL) are loaded into BC.
  - `ld bc, (hl)` → `ld c, (hl)`; `inc hl`; `ld b, (hl)`; `dec hl`

- `ld (hl), rr` · 4 bytes · 26 cycles · rr: bc de · The contents of `rr` are loaded into (HL).
  - `ld (hl), bc` → `ld (hl), c`; `inc hl`; `ld (hl), b`; `dec hl`
  - `ld (hl), de` → `ld (hl), e`; `inc hl`; `ld (hl), d`; `dec hl`

## Undocumented

Left out of Zilog's manual, but the Z80 runs them, and so does this emulator.

- `ld ixh/l, nn` · 3 bytes · 11 cycles · Loads `nn` into `ixh/l`.
  - `ld ixh, nn`
  - `ld ixl, nn`
  - `ld iyh, nn`
  - `ld iyl, nn`

- `ld r, ixh/l` · 2 bytes · 8 cycles · r: a b c d e · The contents of `ixh/l` are loaded into `r`.
  - `ld b, ixh`
  - `ld b, ixl`
  - `ld c, ixh`
  - `ld c, ixl`
  - `ld d, ixh`
  - `ld d, ixl`
  - `ld e, ixh`
  - `ld e, ixl`
  - `ld a, ixh`
  - `ld a, ixl`
  - `ld b, iyh`
  - `ld b, iyl`
  - `ld c, iyh`
  - `ld c, iyl`
  - `ld d, iyh`
  - `ld d, iyl`
  - `ld e, iyh`
  - `ld e, iyl`
  - `ld a, iyh`
  - `ld a, iyl`

- `ld ixh/l, r` · 2 bytes · 8 cycles · r: a b c d e · The contents of `r` are loaded into `ixh/l`.
  - `ld ixh, b`
  - `ld ixh, c`
  - `ld ixh, d`
  - `ld ixh, e`
  - `ld ixh, a`
  - `ld ixl, b`
  - `ld ixl, c`
  - `ld ixl, d`
  - `ld ixl, e`
  - `ld ixl, a`
  - `ld iyh, b`
  - `ld iyh, c`
  - `ld iyh, d`
  - `ld iyh, e`
  - `ld iyh, a`
  - `ld iyl, b`
  - `ld iyl, c`
  - `ld iyl, d`
  - `ld iyl, e`
  - `ld iyl, a`

- `ld ixh/l, ixh/l'` · 2 bytes · 8 cycles · The contents of `ixh/l'` are loaded into `ixh/l`.
  - `ld ixh, ixh`
  - `ld ixh, ixl`
  - `ld ixl, ixh`
  - `ld ixl, ixl`
  - `ld iyh, iyh`
  - `ld iyh, iyl`
  - `ld iyl, iyh`
  - `ld iyl, iyl`

## Operands

- `r`: An 8-bit register: `a`, `b`, `c`, `d`, `e`, `h` or `l`. The placeholder `r` stands for an 8-bit register. In `ld a, r` and `ld r, a`, the literal `r` names the refresh register.
- `r'`: An 8-bit register: `a`, `b`, `c`, `d`, `e`, `h` or `l`. It may be the same register as `r`.
- [`nn`](https://asm-editor.specy.app/documentation/z80/registers/operand-nn.md): An 8-bit immediate value, `0` to `255` or `-128` to `127`, written as a number, character constant or symbol.
- [`(hl)`](https://asm-editor.specy.app/documentation/z80/registers/operand-hl.md): The byte in memory at the address stored in `hl`.
- [`(ix+dd)`](https://asm-editor.specy.app/documentation/z80/registers/operand-ix-dd.md): The byte in memory at `ix + dd`, where `dd` is a signed displacement from `-128` to `127`, for example `(ix+5)` or `(ix-3)`. `(iy+dd)` works the same way.
- [`nnnn`](https://asm-editor.specy.app/documentation/z80/registers/operand-nnnn.md): A 16-bit value or address, `0` to `65535`, written as a number or label. `(nnnn)` accesses memory at that address.
- `rr`: A register pair: `bc`, `de`, `hl` or `sp`.
- [`ix`](https://asm-editor.specy.app/documentation/z80/registers/register-ix.md): The `ix` index register. You can also use `iy`, with the same instruction size and timing.
- `rr'`: A register pair: `bc`, `de` or `hl`. It may be the same pair as `rr`.
- [`ixh/l`](https://asm-editor.specy.app/documentation/z80/registers/register-ixh.md): The high or low byte of `ix`: `ixh` or `ixl`. For `iy`, use `iyh` or `iyl`.
- `ixh/l'`: Choose `ixh` or `ixl` again; the same half may be used twice. If the other operand uses `iyh` or `iyl`, choose from `iyh` or `iyl` here too.

## Example

```z80
        .org 0x8000
        ld bc, 0x9000
        halt
```