divsl
Signed divide long, with remainder
Divides a long by a long, signed, putting the quotient in one data register and the remainder in another.
Size .l68020 only: select opt p=68020 before any code or data
- ● set from the result
- 0 always 0
- – not changed
Forms
Operands
<ea>- An operand using one of the addressing modes listed for this form. The list determines whether it can be a register, memory or an immediate value. With
opt p=68020, an allowedd(An,Xn)ord(PC,Xn)mode also permits the corresponding 68020 indexed and memory indirect forms. See 68020 addressing. More Dr:Dq- A remainder register followed by a quotient register, for example
d2:d1. Fordivs.landdivu.l, both supply the 64-bit dividend, high long first. Fordivsl.landdivul.l, onlyDqsupplies the 32-bit dividend. The quotient replacesDqand the remainder replacesDr. More #imm- An immediate value written after
#: a number, character or label, such as#10,#$FFor#'a'. It must fit the operation’s size: byte-128to255, word-32768to65535, or long-2147483648to4294967295; signed and unsigned spellings are accepted. More
In divsl.l <ea>, Dr:Dq, Dq supplies the dividend. The old value of Dr is not used. The quotient replaces Dq and the remainder replaces Dr. The remainder has the dividend’s sign: -7 divided by 2 gives quotient -3 and remainder -1.
Use different registers to keep both results. If Dr and Dq name the same register, only the quotient remains. This uses the same 32-bit dividend as the single-register form of divs.l. The register-pair form of divs.l takes a 64-bit dividend instead.
A zero divisor raises a division-by-zero exception through vector 5 at $14. The only signed 32-bit quotient overflow, -2147483648 divided by -1, sets V and leaves the registers unchanged. Otherwise V is cleared and N and Z describe the quotient. C is cleared and X is unchanged.
opt p=68020
* --- A quotient and a remainder of 32 bits ---
move.l #-100007, d2 ; the number to divide
divsl.l #10, d1:d2 ; d2 = -10000, and the remainder has its sign: d1 = -7