A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL and B are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More
indr
Operands
indrLoading...
Variants
Every form of indr the assembler accepts. The cycles column counts clock
cycles, written as taken/not taken for the conditional forms.
| Instruction | Description | Flags | Bytes | Cycles |
|---|---|---|---|---|
| indr | A byte from the port at the 16-bit address contained in the BC register pair is written to the memory location pointed to by HL. Then HL and B are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing. Note that the carry flag may be affected, contrary to documentation. Read More | C=*N=1P/V=*H=*Z=1S=* | 2 | 21/16 |