Z80 Registers & Flags
Registers
The Z80 has seven general purpose 8 bit registers plus the accumulator, which pair up into 16 bit registers, two index registers, a stack pointer and a program counter. A second, alternate set of the same registers is swapped in with a single instruction, which is why interrupt handlers on real hardware could save the machine state in four clock cycles.
a
8 bitAccumulator. The destination of every 8 bit arithmetic and logic instruction, and the only register that can be loaded from or stored to a bare address.
f
8 bitFlags. Holds the sign, zero, half carry, parity/overflow, add/subtract and carry bits; it is read and written only as part of af (push af, pop af, ex af,af').
b
8 bitGeneral purpose register, and the counter used by djnz, the block instructions (ldir, cpir, …) and the (c) port instructions.
c
8 bitGeneral purpose register, and the port number used by in r,(c) and out (c),r.
d
8 bitGeneral purpose register, the high half of de.
e
8 bitGeneral purpose register, the low half of de.
h
8 bitGeneral purpose register, the high half of hl.
l
8 bitGeneral purpose register, the low half of hl.
af
16 bitThe accumulator and the flags as one 16 bit register. Only push, pop and ex af,af' use it as a pair.
bc
16 bitThe b and c registers as a pair. Used as a byte counter by the block instructions and as the port address by the (c) forms.
de
16 bitThe d and e registers as a pair. The destination pointer of the block copy instructions.
hl
16 bitThe h and l registers as a pair. The Z80's main pointer: (hl) can stand in for any 8 bit register operand, and add hl,rr is the only 16 bit addition.
ix
16 bitIndex register. Addressed as (ix+dd) with a signed 8 bit displacement, which costs an extra prefix byte and several clock cycles per access.
iy
16 bitIndex register, identical to ix but with its own prefix.
sp
16 bitStack pointer. push decrements it by two before writing, so the stack grows downwards; it starts at the top of memory.
pc
16 bitProgram counter: the address of the next instruction to execute.
af'
16 bitThe alternate accumulator and flags, swapped in by ex af,af'. Traditionally reserved for interrupt handlers.
bc'
16 bitThe alternate bc, swapped in by exx together with de' and hl'.
de'
16 bitThe alternate de, swapped in by exx.
hl'
16 bitThe alternate hl, swapped in by exx.
i
8 bitInterrupt vector register: the high byte of the vector table address in interrupt mode 2. Nothing raises interrupts in this emulator.
r
8 bitMemory refresh register. The low 7 bits increment on every instruction fetch, which is why it is sometimes used as a cheap random number.
ixh
8 bit, undocumentedThe high half of ix.
Undocumented: not in Zilog's manual, but implemented by the hardware and by this emulator.
ixl
8 bit, undocumentedThe low half of ix.
Undocumented: not in Zilog's manual, but implemented by the hardware and by this emulator.
iyh
8 bit, undocumentedThe high half of iy.
Undocumented: not in Zilog's manual, but implemented by the hardware and by this emulator.
iyl
8 bit, undocumentedThe low half of iy.
Undocumented: not in Zilog's manual, but implemented by the hardware and by this emulator.
Flags
The flags live in the F register, which is only reachable as the low half of af. Every arithmetic and logic instruction updates some of them; the instruction pages list which.
S
bit 7Sign: set when the result is negative (bit 7 of the result).
Z
bit 6Zero: set when the result is zero.
H
bit 4Half carry: carry from bit 3 to bit 4, used by daa for BCD arithmetic.
P/V
bit 2Parity/overflow: parity of the result for logical and rotate instructions (set when even), signed overflow for arithmetic instructions.
N
bit 1Add/subtract: set when the last operation was a subtraction, used by daa.
C
bit 0Carry: carry out of bit 7 (or 15), borrow for subtractions, and the bit shifted out by rotates and shifts.
Condition codes
Written after jp, call and ret to run them only when the flags say so, as in jp nz, loop. jr understands only the first four.
nz
Not zero: the Z flag is reset.
z
Zero: the Z flag is set.
nc
No carry: the C flag is reset.
c
Carry: the C flag is set. Not to be confused with the c register.
po
Parity odd / no overflow: the P/V flag is reset.
pe
Parity even / overflow: the P/V flag is set.
p
Plus: the S flag is reset, i.e. the result was not negative.
m
Minus: the S flag is set, i.e. the result was negative.
nv
No overflow: a synonym of po, kept for other assemblers.
v
Overflow: a synonym of pe, kept for other assemblers.
Operand placeholders
The instruction tables write operands with these placeholders: ld (ix+dd), nn is written in a program as ld (ix+2), 42.
nn
8 bit value: a number from 0 to 255 (or -128 to 127), a character constant, or a symbol.
nnnn
16 bit value or address, from 0 to 65535. Labels are 16 bit values.
dd
Signed 8 bit displacement, -128 to 127, added to ix or iy to form the address.
offset
Target of a relative jump. Write a label or an address: the assembler computes the -128 to 127 displacement and reports an error when the target is out of reach.
(hl)
The byte in memory at the address in hl. Usable wherever an 8 bit register is, at the cost of one extra memory access.
(ix+dd)
The byte in memory at ix plus the signed displacement, e.g. ld a,(ix+2). iy works the same way.
cc
A condition code, tested against the flags by jp, call, ret and (for the first four only) jr.