x86-64 extensions

This emulator does not support 3DNow!. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• pf2iw — Packed Floating-Point to Integer Word Conversion
• pfnacc — Packed Floating-Point Negative Accumulate
• pfpnacc — Packed Floating-Point Positive-Negative Accumulate
• pi2fw — Packed Integer to Floating-Point Word Conversion
• pswapd — Packed Swap Doubleword

• llwpcb
• lwpins
• lwpval
• slwpcb

This emulator does not support SSE4A. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• extrq — Extract Field
• insertq — Insert Field
• movntsd — Store Scalar Double-Precision Floating-Point Values Using Non-Temporal Hint
• movntss — Store Scalar Single-Precision Floating-Point Values Using Non-Temporal Hint

This emulator does not support XOP and FMA4. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vfmaddpd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmaddps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmaddsd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmaddss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmaddsubpd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsubps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmsubaddpd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubaddps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfmsubpd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsubps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsubsd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsubss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmaddpd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmaddps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmaddsd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmaddss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmsubpd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsubps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsubsd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsubss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfrczpd — Extract Fraction Packed Double-Precision Floating-Point
• vfrczps — Extract Fraction Packed Single-Precision Floating-Point
• vfrczsd — Extract Fraction Scalar Double-Precision Floating-Point
• vfrczss — Extract Fraction Scalar Single-Precision Floating Point
• vpcmov — Packed Conditional Move
• vpcomb — Compare Packed Signed Byte Integers
• vpcomd — Compare Packed Signed Doubleword Integers
• vpcomq — Compare Packed Signed Quadword Integers
• vpcomub — Compare Packed Unsigned Byte Integers
• vpcomud — Compare Packed Unsigned Doubleword Integers
• vpcomuq — Compare Packed Unsigned Quadword Integers
• vpcomuw — Compare Packed Unsigned Word Integers
• vpcomw — Compare Packed Signed Word Integers
• vphaddbd — Packed Horizontal Add Signed Byte to Signed Doubleword
• vphaddbq — Packed Horizontal Add Signed Byte to Signed Quadword
• vphaddbw — Packed Horizontal Add Signed Byte to Signed Word
• vphadddq — Packed Horizontal Add Signed Doubleword to Signed Quadword
• vphaddubd — Packed Horizontal Add Unsigned Byte to Doubleword
• vphaddubq — Packed Horizontal Add Unsigned Byte to Quadword
• vphaddubw — Packed Horizontal Add Unsigned Byte to Word
• vphaddudq — Packed Horizontal Add Unsigned Doubleword to Quadword
• vphadduwd — Packed Horizontal Add Unsigned Word to Doubleword
• vphadduwq — Packed Horizontal Add Unsigned Word to Quadword
• vphaddwd — Packed Horizontal Add Signed Word to Signed Doubleword
• vphaddwq — Packed Horizontal Add Signed Word to Signed Quadword
• vphsubbw — Packed Horizontal Subtract Signed Byte to Signed Word
• vphsubdq — Packed Horizontal Subtract Signed Doubleword to Signed Quadword
• vphsubwd — Packed Horizontal Subtract Signed Word to Signed Doubleword
• vpmacsdd — Packed Multiply Accumulate Signed Doubleword to Signed Doubleword
• vpmacsdqh — Packed Multiply Accumulate Signed High Doubleword to Signed Quadword
• vpmacsdql — Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword
• vpmacssdd — Packed Multiply Accumulate with Saturation Signed Doubleword to Signed Doubleword
• vpmacssdqh — Packed Multiply Accumulate with Saturation Signed High Doubleword to Signed Quadword
• vpmacssdql — Packed Multiply Accumulate with Saturation Signed Low Doubleword to Signed Quadword
• vpmacsswd — Packed Multiply Accumulate with Saturation Signed Word to Signed Doubleword
• vpmacssww — Packed Multiply Accumulate with Saturation Signed Word to Signed Word
• vpmacswd — Packed Multiply Accumulate Signed Word to Signed Doubleword
• vpmacsww — Packed Multiply Accumulate Signed Word to Signed Word
• vpmadcsswd — Packed Multiply Add Accumulate with Saturation Signed Word to Signed Doubleword
• vpmadcswd — Packed Multiply Add Accumulate Signed Word to Signed Doubleword
• vpperm — Packed Permute Bytes
• vprotb — Packed Rotate Bytes
• vprotd — Packed Rotate Doublewords
• vprotq — Packed Rotate Quadwords
• vprotw — Packed Rotate Words
• vpshab — Packed Shift Arithmetic Bytes
• vpshad — Packed Shift Arithmetic Doublewords
• vpshaq — Packed Shift Arithmetic Quadwords
• vpshaw — Packed Shift Arithmetic Words
• vpshlb — Packed Shift Logical Bytes
• vpshld — Packed Shift Logical Doublewords
• vpshlq — Packed Shift Logical Quadwords
• vpshlw — Packed Shift Logical Words

This emulator does not support TBM. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• blcfill — Fill From Lowest Clear Bit
• blci — Isolate Lowest Clear Bit
• blcic — Isolate Lowest Set Bit and Complement
• blcmsk — Mask From Lowest Clear Bit
• blcs — Set Lowest Clear Bit
• blsfill — Fill From Lowest Set Bit
• blsic — Isolate Lowest Set Bit and Complement
• t1mskc — Inverse Mask From Trailing Ones
• tzmsk — Mask From Trailing Zeros

This emulator does not support AVX-NE-CONVERT. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vbcstnebf162ps — Load and convert one BF16 value, broadcasting it across packed FP32 elements
• vbcstnebf16ps
• vbcstnesh2ps — Load FP16 Element and Convert to FP32 Element with Broadcast
• vcvtneebf162ps — Convert Even Elements of Packed BF16 Values to FP32 Values
• vcvtneeph2ps — Convert Even Elements of Packed FP16 Values to FP32 Values
• vcvtneobf162ps — Convert Odd Elements of Packed BF16 Values to FP32 Values
• vcvtneoph2ps — Convert Odd Elements of Packed FP16 Values to FP32 Values

The AVX-512 and AVX-IFMA forms of these instructions are not supported by this emulator; the other forms run.

• vaddpd — Add Packed Double-Precision Floating-Point Values
• vaddps — Add Packed Single-Precision Floating-Point Values
• valignd — Align Doubleword Vectors (not supported: AVX-512)
• valignq — Align Quadword Vectors (not supported: AVX-512)
• vandnpd — Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
• vandnps — Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values
• vandpd — Bitwise Logical AND of Packed Double-Precision Floating-Point Values
• vandps — Bitwise Logical AND of Packed Single-Precision Floating-Point Values
• vblendmpd — Blend Packed Double-Precision Floating-Point Vectors Using an OpMask Control (not supported: AVX-512)
• vblendmps — Blend Packed Single-Precision Floating-Point Vectors Using an OpMask Control (not supported: AVX-512)
• vbroadcastf32x2 — Broadcast Two Single-Precision Floating-Point Elements (not supported: AVX-512)
• vbroadcastf32x4 — Broadcast Four Single-Precision Floating-Point Elements (not supported: AVX-512)
• vbroadcastf32x8 — Broadcast Eight Single-Precision Floating-Point Elements (not supported: AVX-512)
• vbroadcastf64x2 — Broadcast Two Double-Precision Floating-Point Elements (not supported: AVX-512)
• vbroadcastf64x4 — Broadcast Four Double-Precision Floating-Point Elements (not supported: AVX-512)
• vbroadcasti32x2 — Broadcast Two Doubleword Elements (not supported: AVX-512)
• vbroadcasti32x4 — Broadcast Four Doubleword Elements (not supported: AVX-512)
• vbroadcasti32x8 — Broadcast Eight Doubleword Elements (not supported: AVX-512)
• vbroadcasti64x2 — Broadcast Two Quadword Elements (not supported: AVX-512)
• vbroadcasti64x4 — Broadcast Four Quadword Elements (not supported: AVX-512)
• vbroadcastsd — Broadcast Double-Precision Floating-Point Element
• vbroadcastss — Broadcast Single-Precision Floating-Point Element
• vcmpeq_oqpd — Compare Packed Double-Precision Floating-Point Values for Equal (Ordered, Non-Signaling) (not supported: AVX-512)
• vcmpeq_oqps — Compare Packed Single-Precision Floating-Point Values for Equal (Ordered, Non-Signaling) (not supported: AVX-512)
• vcmpeq_oqsd — Compare Scalar Double-Precision Floating-Point Values for Equal (Ordered, Non-Signaling) (not supported: AVX-512)
• vcmpeq_oqss — Compare Scalar Single-Precision Floating-Point Values for Equal (Ordered, Non-Signaling) (not supported: AVX-512)
• vcmpeq_uqpd — Compare Packed Double-Precision Floating-Point Values for Equal (Unordered, Non-Signaling)
• vcmpeq_uqps — Compare Packed Single-Precision Floating-Point Values for Equal (Unordered, Non-Signaling)
• vcmpeq_uspd — Compare Packed Double-Precision Floating-Point Values for Equal (Unordered, Signaling)
• vcmpeq_usps — Compare Packed Single-Precision Floating-Point Values for Equal (Unordered, Signaling)
• vcmpeqpd — Compare Packed Double-Precision Floating-Point Values for Equal
• vcmpeqps — Compare Packed Single-Precision Floating-Point Values for Equal
• vcmpfalse_oqpd — Compare Packed Double-Precision Floating-Point Values for False (Ordered, Non-Signaling)
• vcmpfalse_oqps — Compare Packed Single-Precision Floating-Point Values for False (Ordered, Non-Signaling)
• vcmpfalse_ospd — Compare Packed Double-Precision Floating-Point Values for False (Ordered, Signaling)
• vcmpfalse_osps — Compare Packed Single-Precision Floating-Point Values for False (Ordered, Signaling)
• vcmpfalsepd — Compare Packed Double-Precision Floating-Point Values for False
• vcmpfalseps — Compare Packed Single-Precision Floating-Point Values for False
• vcmpge_oqpd — Compare Packed Double-Precision Floating-Point Values for Greater Than or Equal (Ordered, Non-Signaling)
• vcmpge_oqps — Compare Packed Single-Precision Floating-Point Values for Greater Than or Equal (Ordered, Non-Signaling)
• vcmpge_ospd — Compare Packed Double-Precision Floating-Point Values for Greater Than or Equal (Ordered, Signaling)
• vcmpge_osps — Compare Packed Single-Precision Floating-Point Values for Greater Than or Equal (Ordered, Signaling)
• vcmpgepd — Compare Packed Double-Precision Floating-Point Values for Greater Than or Equal
• vcmpgeps — Compare Packed Single-Precision Floating-Point Values for Greater Than or Equal
• vcmpgt_oqpd — Compare Packed Double-Precision Floating-Point Values for Greater Than (Ordered, Non-Signaling)
• vcmpgt_oqps — Compare Packed Single-Precision Floating-Point Values for Greater Than (Ordered, Non-Signaling)
• vcmpgt_ospd — Compare Packed Double-Precision Floating-Point Values for Greater Than (Ordered, Signaling)
• vcmpgt_osps — Compare Packed Single-Precision Floating-Point Values for Greater Than (Ordered, Signaling)
• vcmpgtpd — Compare Packed Double-Precision Floating-Point Values for Greater Than
• vcmpgtps — Compare Packed Single-Precision Floating-Point Values for Greater Than
• vcmple_oqpd — Compare Packed Double-Precision Floating-Point Values for Less Than or Equal (Ordered, Non-Signaling)
• vcmple_oqps — Compare Packed Single-Precision Floating-Point Values for Less Than or Equal (Ordered, Non-Signaling)
• vcmple_ospd — Compare Packed Double-Precision Floating-Point Values for Less Than or Equal (Ordered, Signaling)
• vcmple_osps — Compare Packed Single-Precision Floating-Point Values for Less Than or Equal (Ordered, Signaling)
• vcmplepd — Compare Packed Double-Precision Floating-Point Values for Less Than or Equal
• vcmpleps — Compare Packed Single-Precision Floating-Point Values for Less Than or Equal
• vcmplt_oqpd — Compare Packed Double-Precision Floating-Point Values for Less Than (Ordered, Non-Signaling)
• vcmplt_oqps — Compare Packed Single-Precision Floating-Point Values for Less Than (Ordered, Non-Signaling)
• vcmplt_ospd — Compare Packed Double-Precision Floating-Point Values for Less Than (Ordered, Signaling)
• vcmplt_osps — Compare Packed Single-Precision Floating-Point Values for Less Than (Ordered, Signaling)
• vcmpltpd — Compare Packed Double-Precision Floating-Point Values for Less Than
• vcmpltps — Compare Packed Single-Precision Floating-Point Values for Less Than
• vcmpneq_oqpd — Compare Packed Double-Precision Floating-Point Values for Not Equal (Ordered, Non-Signaling)
• vcmpneq_oqps — Compare Packed Single-Precision Floating-Point Values for Not Equal (Ordered, Non-Signaling)
• vcmpneq_ospd — Compare Packed Double-Precision Floating-Point Values for Not Equal (Ordered, Signaling)
• vcmpneq_osps — Compare Packed Single-Precision Floating-Point Values for Not Equal (Ordered, Signaling)
• vcmpneq_uqpd — Compare Packed Double-Precision Floating-Point Values for Not Equal (Unordered, Non-Signaling)
• vcmpneq_uqps — Compare Packed Single-Precision Floating-Point Values for Not Equal (Unordered, Non-Signaling)
• vcmpneq_uspd — Compare Packed Double-Precision Floating-Point Values for Not Equal (Unordered, Signaling)
• vcmpneq_usps — Compare Packed Single-Precision Floating-Point Values for Not Equal (Unordered, Signaling)
• vcmpneqpd — Compare Packed Double-Precision Floating-Point Values for Not Equal
• vcmpneqps — Compare Packed Single-Precision Floating-Point Values for Not Equal
• vcmpnge_uqpd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Non-Signaling)
• vcmpnge_uqps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Non-Signaling)
• vcmpnge_uspd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Signaling)
• vcmpnge_usps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Signaling)
• vcmpngepd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than or Equal
• vcmpngeps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than or Equal
• vcmpngt_uqpd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than (Unordered, Non-Signaling)
• vcmpngt_uqps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than (Unordered, Non-Signaling)
• vcmpngt_uspd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than (Unordered, Signaling)
• vcmpngt_usps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than (Unordered, Signaling)
• vcmpngtpd — Compare Packed Double-Precision Floating-Point Values for Not Greater Than
• vcmpngtps — Compare Packed Single-Precision Floating-Point Values for Not Greater Than
• vcmpnle_uqpd — Compare Packed Double-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Non-Signaling)
• vcmpnle_uqps — Compare Packed Single-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Non-Signaling)
• vcmpnle_uspd — Compare Packed Double-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Signaling)
• vcmpnle_usps — Compare Packed Single-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Signaling)
• vcmpnlepd — Compare Packed Double-Precision Floating-Point Values for Not Less Than or Equal
• vcmpnleps — Compare Packed Single-Precision Floating-Point Values for Not Less Than or Equal
• vcmpnlt_uqpd — Compare Packed Double-Precision Floating-Point Values for Not Less Than (Unordered, Non-Signaling)
• vcmpnlt_uqps — Compare Packed Single-Precision Floating-Point Values for Not Less Than (Unordered, Non-Signaling)
• vcmpnlt_uspd — Compare Packed Double-Precision Floating-Point Values for Not Less Than (Unordered, Signaling)
• vcmpnlt_usps — Compare Packed Single-Precision Floating-Point Values for Not Less Than (Unordered, Signaling)
• vcmpnltpd — Compare Packed Double-Precision Floating-Point Values for Not Less Than
• vcmpnltps — Compare Packed Single-Precision Floating-Point Values for Not Less Than
• vcmpord_qpd — Compare Packed Double-Precision Floating-Point Values for Ordered (Non-Signaling)
• vcmpord_qps — Compare Packed Single-Precision Floating-Point Values for Ordered (Non-Signaling)
• vcmpord_spd — Compare Packed Double-Precision Floating-Point Values for Ordered (Signaling)
• vcmpord_sps — Compare Packed Single-Precision Floating-Point Values for Ordered (Signaling)
• vcmpordpd — Compare Packed Double-Precision Floating-Point Values for Ordered
• vcmpordps — Compare Packed Single-Precision Floating-Point Values for Ordered
• vcmppd — Compare Packed Double-Precision Floating-Point Values
• vcmpps — Compare Packed Single-Precision Floating-Point Values
• vcmptrue_uqpd — Compare Packed Double-Precision Floating-Point Values for True (Unordered, Non-Signaling)
• vcmptrue_uqps — Compare Packed Single-Precision Floating-Point Values for True (Unordered, Non-Signaling)
• vcmptrue_uspd — Compare Packed Double-Precision Floating-Point Values for True (Unordered, Signaling)
• vcmptrue_usps — Compare Packed Single-Precision Floating-Point Values for True (Unordered, Signaling)
• vcmptruepd — Compare Packed Double-Precision Floating-Point Values for True
• vcmptrueps — Compare Packed Single-Precision Floating-Point Values for True
• vcmpunord_qpd — Compare Packed Double-Precision Floating-Point Values for Unordered (Non-Signaling)
• vcmpunord_qps — Compare Packed Single-Precision Floating-Point Values for Unordered (Non-Signaling)
• vcmpunord_spd — Compare Packed Double-Precision Floating-Point Values for Unordered (Signaling)
• vcmpunord_sps — Compare Packed Single-Precision Floating-Point Values for Unordered (Signaling)
• vcmpunordpd — Compare Packed Double-Precision Floating-Point Values for Unordered
• vcmpunordps — Compare Packed Single-Precision Floating-Point Values for Unordered
• vcompresspd — Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory/Register (not supported: AVX-512)
• vcompressps — Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory/Register (not supported: AVX-512)
• vcvtdq2pd — Convert Packed Dword Integers to Packed Double-Precision FP Values
• vcvtdq2ps — Convert Packed Dword Integers to Packed Single-Precision FP Values
• vcvtpd2qq — Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers (not supported: AVX-512)
• vcvtpd2udq — Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (not supported: AVX-512)
• vcvtpd2uqq — Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (not supported: AVX-512)
• vcvtps2dq — Convert Packed Single-Precision FP Values to Packed Dword Integers
• vcvtps2pd — Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values
• vcvtps2qq — Convert packed single-precision floating-point values to packed signed quadword integers (not supported: AVX-512)
• vcvtps2udq — Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (not supported: AVX-512)
• vcvtps2uqq — Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (not supported: AVX-512)
• vcvtqq2pd — Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vcvtqq2ps — Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vcvtsd2usi — Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer (not supported: AVX-512)
• vcvtss2usi — Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer (not supported: AVX-512)
• vcvttpd2qq — Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers (not supported: AVX-512)
• vcvttpd2udq — Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers (not supported: AVX-512)
• vcvttpd2uqq — Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers (not supported: AVX-512)
• vcvttps2dq — Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
• vcvttps2qq — Convert packed single-precision floating-point values to packed signed quadword integers with truncation (not supported: AVX-512)
• vcvttps2udq — Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (not supported: AVX-512)
• vcvttps2uqq — Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (not supported: AVX-512)
• vcvttsd2usi — Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer (not supported: AVX-512)
• vcvttss2usi — Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer (not supported: AVX-512)
• vcvtudq2pd — Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vcvtudq2ps — Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vcvtuqq2pd — Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vcvtuqq2ps — Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vcvtusi2sd — Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vcvtusi2ss — Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vdbpsadbw — Double Block Packed Sum-Absolute-Differences on Unsigned Bytes (not supported: AVX-512)
• vdivpd — Divide Packed Double-Precision Floating-Point Values
• vdivps — Divide Packed Single-Precision Floating-Point Values
• vexp2pd — Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error (not supported: AVX-512)
• vexp2ps — Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error (not supported: AVX-512)
• vexpandpd — Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory (not supported: AVX-512)
• vexpandps — Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory (not supported: AVX-512)
• vextractf32x4 — Extract 128 Bits of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vextractf32x8 — Extract 256 Bits of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vextractf64x2 — Extract 128 Bits of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vextractf64x4 — Extract 256 Bits of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vextracti32x4 — Extract 128 Bits of Packed Doubleword Integer Values (not supported: AVX-512)
• vextracti32x8 — Extract 256 Bits of Packed Doubleword Integer Values (not supported: AVX-512)
• vextracti64x2 — Extract 128 Bits of Packed Quadword Integer Values (not supported: AVX-512)
• vextracti64x4 — Extract 256 Bits of Packed Quadword Integer Values (not supported: AVX-512)
• vextractps — Extract Packed Single Precision Floating-Point Value
• vfixupimmpd — Fix Up Special Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vfixupimmps — Fix Up Special Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vfixupimmsd — Fix Up Special Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vfixupimmss — Fix Up Special Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vfmadd132pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd132ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmadd213pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd213ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmadd231pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd231ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmaddsub132pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub132ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmaddsub213pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub213ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmaddsub231pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub231ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmsub132pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub132ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsub213pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub213ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsub231pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub231ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsubadd132pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd132ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfmsubadd213pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd213ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfmsubadd231pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd231ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfnmadd132pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd132ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmadd213pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd213ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmadd231pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd231ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmsub132pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub132ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsub213pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub213ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsub231pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub231ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfpclasspd — Test Class of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vfpclassps — Test Class of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vfpclasssd — Test Class of Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vfpclassss — Test Class of Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vgatherdpd — Gather Packed Double-Precision Floating-Point Values Using Signed Doubleword Indices
• vgatherdps — Gather Packed Single-Precision Floating-Point Values Using Signed Doubleword Indices
• vgatherpf0dpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint (not supported: AVX-512)
• vgatherpf0dps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint (not supported: AVX-512)
• vgatherpf0qpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint (not supported: AVX-512)
• vgatherpf0qps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint (not supported: AVX-512)
• vgatherpf1dpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint (not supported: AVX-512)
• vgatherpf1dps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint (not supported: AVX-512)
• vgatherpf1qpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint (not supported: AVX-512)
• vgatherpf1qps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint (not supported: AVX-512)
• vgatherqpd — Gather Packed Double-Precision Floating-Point Values Using Signed Quadword Indices
• vgatherqps — Gather Packed Single-Precision Floating-Point Values Using Signed Quadword Indices
• vgetexppd — Extract Exponents of Packed Double-Precision Floating-Point Values as Double-Precision Floating-Point Values (not supported: AVX-512)
• vgetexpps — Extract Exponents of Packed Single-Precision Floating-Point Values as Single-Precision Floating-Point Values (not supported: AVX-512)
• vgetexpsd — Extract Exponent of Scalar Double-Precision Floating-Point Value as Double-Precision Floating-Point Value (not supported: AVX-512)
• vgetexpss — Extract Exponent of Scalar Single-Precision Floating-Point Value as Single-Precision Floating-Point Value (not supported: AVX-512)
• vgetmantpd — Extract Normalized Mantissas from Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vgetmantps — Extract Normalized Mantissas from Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vgetmantsd — Extract Normalized Mantissa from Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vgetmantss — Extract Normalized Mantissa from Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vinsertf32x4 — Insert 128 Bits of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vinsertf32x8 — Insert 256 Bits of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vinsertf64x2 — Insert 128 Bits of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vinsertf64x4 — Insert 256 Bits of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vinserti32x4 — Insert 128 Bits of Packed Doubleword Integer Values (not supported: AVX-512)
• vinserti32x8 — Insert 256 Bits of Packed Doubleword Integer Values (not supported: AVX-512)
• vinserti64x2 — Insert 128 Bits of Packed Quadword Integer Values (not supported: AVX-512)
• vinserti64x4 — Insert 256 Bits of Packed Quadword Integer Values (not supported: AVX-512)
• vmaxpd — Return Maximum Packed Double-Precision Floating-Point Values
• vmaxph — Return Maximum Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vmaxps — Return Maximum Packed Single-Precision Floating-Point Values
• vminpd — Return Minimum Packed Double-Precision Floating-Point Values
• vminph — Return Minimum Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vminps — Return Minimum Packed Single-Precision Floating-Point Values
• vmovapd — Move Aligned Packed Double-Precision Floating-Point Values
• vmovaps — Move Aligned Packed Single-Precision Floating-Point Values
• vmovddup — Move One Double-FP and Duplicate
• vmovdqa32 — Move Aligned Doubleword Values (not supported: AVX-512)
• vmovdqa64 — Move Aligned Quadword Values (not supported: AVX-512)
• vmovdqu16 — Move Unaligned Word Values (not supported: AVX-512)
• vmovdqu32 — Move Unaligned Doubleword Values (not supported: AVX-512)
• vmovdqu64 — Move Unaligned Quadword Values (not supported: AVX-512)
• vmovdqu8 — Move Unaligned Byte Values (not supported: AVX-512)
• vmovntdq — Store Double Quadword Using Non-Temporal Hint
• vmovntdqa — Load Double Quadword Non-Temporal Aligned Hint
• vmovntpd — Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
• vmovntps — Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
• vmovshdup — Move Packed Single-FP High and Duplicate
• vmovsldup — Move Packed Single-FP Low and Duplicate
• vmovupd — Move Unaligned Packed Double-Precision Floating-Point Values
• vmovups — Move Unaligned Packed Single-Precision Floating-Point Values
• vmulpd — Multiply Packed Double-Precision Floating-Point Values
• vmulps — Multiply Packed Single-Precision Floating-Point Values
• vorpd — Bitwise Logical OR of Double-Precision Floating-Point Values
• vorps — Bitwise Logical OR of Single-Precision Floating-Point Values
• vpabsb — Packed Absolute Value of Byte Integers
• vpabsd — Packed Absolute Value of Doubleword Integers
• vpabsq — Packed Absolute Value of Quadword Integers (not supported: AVX-512)
• vpabsw — Packed Absolute Value of Word Integers
• vpackssdw — Pack Doublewords into Words with Signed Saturation
• vpacksswb — Pack Words into Bytes with Signed Saturation
• vpackusdw — Pack Doublewords into Words with Unsigned Saturation
• vpackuswb — Pack Words into Bytes with Unsigned Saturation
• vpaddb — Add Packed Byte Integers
• vpaddd — Add Packed Doubleword Integers
• vpaddq — Add Packed Quadword Integers
• vpaddsb — Add Packed Signed Byte Integers with Signed Saturation
• vpaddsw — Add Packed Signed Word Integers with Signed Saturation
• vpaddusb — Add Packed Unsigned Byte Integers with Unsigned Saturation
• vpaddusw — Add Packed Unsigned Word Integers with Unsigned Saturation
• vpaddw — Add Packed Word Integers
• vpalignr — Packed Align Right
• vpandd — Bitwise Logical AND of Packed Doubleword Integers (not supported: AVX-512)
• vpandnd — Bitwise Logical AND NOT of Packed Doubleword Integers (not supported: AVX-512)
• vpandnq — Bitwise Logical AND NOT of Packed Quadword Integers (not supported: AVX-512)
• vpandq — Bitwise Logical AND of Packed Quadword Integers (not supported: AVX-512)
• vpavgb — Average Packed Byte Integers
• vpavgw — Average Packed Word Integers
• vpblendmb — Blend Byte Vectors Using an OpMask Control (not supported: AVX-512)
• vpblendmd — Blend Doubleword Vectors Using an OpMask Control (not supported: AVX-512)
• vpblendmq — Blend Quadword Vectors Using an OpMask Control (not supported: AVX-512)
• vpblendmw — Blend Word Vectors Using an OpMask Control (not supported: AVX-512)
• vpbroadcastb — Broadcast Byte Integer
• vpbroadcastd — Broadcast Doubleword Integer
• vpbroadcastmb2q — Broadcast Low Byte of Mask Register to Packed Quadword Values (not supported: AVX-512)
• vpbroadcastmw2d — Broadcast Low Word of Mask Register to Packed Doubleword Values (not supported: AVX-512)
• vpbroadcastq — Broadcast Quadword Integer
• vpbroadcastw — Broadcast Word Integer
• vpcmpb — Compare Packed Signed Byte Values (not supported: AVX-512)
• vpcmpd — Compare Packed Signed Doubleword Values (not supported: AVX-512)
• vpcmpeqb — Compare Packed Byte Data for Equality
• vpcmpeqd — Compare Packed Doubleword Data for Equality
• vpcmpeqq — Compare Packed Quadword Data for Equality
• vpcmpequb (not supported: AVX-512)
• vpcmpequd (not supported: AVX-512)
• vpcmpequq (not supported: AVX-512)
• vpcmpequw (not supported: AVX-512)
• vpcmpeqw — Compare Packed Word Data for Equality
• vpcmpgeb (not supported: AVX-512)
• vpcmpged (not supported: AVX-512)
• vpcmpgeq (not supported: AVX-512)
• vpcmpgeub (not supported: AVX-512)
• vpcmpgeud (not supported: AVX-512)
• vpcmpgeuq (not supported: AVX-512)
• vpcmpgeuw (not supported: AVX-512)
• vpcmpgew (not supported: AVX-512)
• vpcmpgtb — Compare Packed Signed Byte Integers for Greater Than
• vpcmpgtd — Compare Packed Signed Doubleword Integers for Greater Than
• vpcmpgtq — Compare Packed Data for Greater Than
• vpcmpgtub (not supported: AVX-512)
• vpcmpgtud (not supported: AVX-512)
• vpcmpgtuq (not supported: AVX-512)
• vpcmpgtuw (not supported: AVX-512)
• vpcmpgtw — Compare Packed Signed Word Integers for Greater Than
• vpcmpleb (not supported: AVX-512)
• vpcmpled (not supported: AVX-512)
• vpcmpleq (not supported: AVX-512)
• vpcmpleub (not supported: AVX-512)
• vpcmpleud (not supported: AVX-512)
• vpcmpleuq (not supported: AVX-512)
• vpcmpleuw (not supported: AVX-512)
• vpcmplew (not supported: AVX-512)
• vpcmpltb (not supported: AVX-512)
• vpcmpltd (not supported: AVX-512)
• vpcmpltq (not supported: AVX-512)
• vpcmpltub (not supported: AVX-512)
• vpcmpltud (not supported: AVX-512)
• vpcmpltuq (not supported: AVX-512)
• vpcmpltuw (not supported: AVX-512)
• vpcmpltw (not supported: AVX-512)
• vpcmpneqb (not supported: AVX-512)
• vpcmpneqd (not supported: AVX-512)
• vpcmpneqq (not supported: AVX-512)
• vpcmpnequb (not supported: AVX-512)
• vpcmpnequd (not supported: AVX-512)
• vpcmpnequq (not supported: AVX-512)
• vpcmpnequw (not supported: AVX-512)
• vpcmpneqw (not supported: AVX-512)
• vpcmpngtb (not supported: AVX-512)
• vpcmpngtd (not supported: AVX-512)
• vpcmpngtq (not supported: AVX-512)
• vpcmpngtub (not supported: AVX-512)
• vpcmpngtud (not supported: AVX-512)
• vpcmpngtuq (not supported: AVX-512)
• vpcmpngtuw (not supported: AVX-512)
• vpcmpngtw (not supported: AVX-512)
• vpcmpnleb (not supported: AVX-512)
• vpcmpnled (not supported: AVX-512)
• vpcmpnleq (not supported: AVX-512)
• vpcmpnleub (not supported: AVX-512)
• vpcmpnleud (not supported: AVX-512)
• vpcmpnleuq (not supported: AVX-512)
• vpcmpnleuw (not supported: AVX-512)
• vpcmpnlew (not supported: AVX-512)
• vpcmpnltb (not supported: AVX-512)
• vpcmpnltd (not supported: AVX-512)
• vpcmpnltq (not supported: AVX-512)
• vpcmpnltub (not supported: AVX-512)
• vpcmpnltud (not supported: AVX-512)
• vpcmpnltuq (not supported: AVX-512)
• vpcmpnltuw (not supported: AVX-512)
• vpcmpnltw (not supported: AVX-512)
• vpcmpq — Compare Packed Signed Quadword Values (not supported: AVX-512)
• vpcmpub — Compare Packed Unsigned Byte Values (not supported: AVX-512)
• vpcmpud — Compare Packed Unsigned Doubleword Values (not supported: AVX-512)
• vpcmpuq — Compare Packed Unsigned Quadword Values (not supported: AVX-512)
• vpcmpuw — Compare Packed Unsigned Word Values (not supported: AVX-512)
• vpcmpw — Compare Packed Signed Word Values (not supported: AVX-512)
• vpcompressd — Store Sparse Packed Doubleword Integer Values into Dense Memory/Register (not supported: AVX-512)
• vpcompressq — Store Sparse Packed Quadword Integer Values into Dense Memory/Register (not supported: AVX-512)
• vpconflictd — Detect Conflicts Within a Vector of Packed Doubleword Values into Dense Memory/Register (not supported: AVX-512)
• vpconflictq — Detect Conflicts Within a Vector of Packed Quadword Values into Dense Memory/Register (not supported: AVX-512)
• vpermb — Permute Byte Integers (not supported: AVX-512)
• vpermd — Permute Doubleword Integers
• vpermi2b — Full Permute of Bytes From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermi2d — Full Permute of Doublewords From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermi2pd — Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermi2ps — Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermi2q — Full Permute of Quadwords From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermi2w — Full Permute of Words From Two Tables Overwriting the Index (not supported: AVX-512)
• vpermilpd — Permute Double-Precision Floating-Point Values
• vpermilps — Permute Single-Precision Floating-Point Values
• vpermpd — Permute Double-Precision Floating-Point Elements
• vpermps — Permute Single-Precision Floating-Point Elements
• vpermq — Permute Quadword Integers
• vpermt2b — Full Permute of Bytes From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermt2d — Full Permute of Doublewords From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermt2pd — Full Permute of Double-Precision Floating-Point Values From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermt2ps — Full Permute of Single-Precision Floating-Point Values From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermt2q — Full Permute of Quadwords From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermt2w — Full Permute of Words From Two Tables Overwriting a Table (not supported: AVX-512)
• vpermw — Permute Word Integers (not supported: AVX-512)
• vpexpandd — Load Sparse Packed Doubleword Integer Values from Dense Memory/Register (not supported: AVX-512)
• vpexpandq — Load Sparse Packed Quadword Integer Values from Dense Memory/Register (not supported: AVX-512)
• vpextrb — Extract Byte
• vpextrw — Extract Word
• vpgatherdd — Gather Packed Doubleword Values Using Signed Doubleword Indices
• vpgatherdq — Gather Packed Quadword Values Using Signed Doubleword Indices
• vpgatherqd — Gather Packed Doubleword Values Using Signed Quadword Indices
• vpgatherqq — Gather Packed Quadword Values Using Signed Quadword Indices
• vplzcntd — Count the Number of Leading Zero Bits for Packed Doubleword Values (not supported: AVX-512)
• vplzcntq — Count the Number of Leading Zero Bits for Packed Quadword Values (not supported: AVX-512)
• vpmadd52huq — Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to Quadword Accumulators (not supported: AVX-IFMA and AVX-512)
• vpmadd52luq — Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Quadword Accumulators (not supported: AVX-IFMA and AVX-512)
• vpmaddubsw — Multiply and Add Packed Signed and Unsigned Byte Integers
• vpmaddwd — Multiply and Add Packed Signed Word Integers
• vpmaxsb — Maximum of Packed Signed Byte Integers
• vpmaxsd — Maximum of Packed Signed Doubleword Integers
• vpmaxsq — Maximum of Packed Signed Quadword Integers (not supported: AVX-512)
• vpmaxsw — Maximum of Packed Signed Word Integers
• vpmaxub — Maximum of Packed Unsigned Byte Integers
• vpmaxud — Maximum of Packed Unsigned Doubleword Integers
• vpmaxuq — Maximum of Packed Unsigned Quadword Integers (not supported: AVX-512)
• vpmaxuw — Maximum of Packed Unsigned Word Integers
• vpminsb — Minimum of Packed Signed Byte Integers
• vpminsd — Minimum of Packed Signed Doubleword Integers
• vpminsq — Minimum of Packed Signed Quadword Integers (not supported: AVX-512)
• vpminsw — Minimum of Packed Signed Word Integers
• vpminub — Minimum of Packed Unsigned Byte Integers
• vpminud — Minimum of Packed Unsigned Doubleword Integers
• vpminuq — Minimum of Packed Unsigned Quadword Integers (not supported: AVX-512)
• vpminuw — Minimum of Packed Unsigned Word Integers
• vpmovb2m — Move Signs of Packed Byte Integers to Mask Register (not supported: AVX-512)
• vpmovd2m — Move Signs of Packed Doubleword Integers to Mask Register (not supported: AVX-512)
• vpmovdb — Down Convert Packed Doubleword Values to Byte Values with Truncation (not supported: AVX-512)
• vpmovdw — Down Convert Packed Doubleword Values to Word Values with Truncation (not supported: AVX-512)
• vpmovm2b — Expand Bits of Mask Register to Packed Byte Integers (not supported: AVX-512)
• vpmovm2d — Expand Bits of Mask Register to Packed Doubleword Integers (not supported: AVX-512)
• vpmovm2q — Expand Bits of Mask Register to Packed Quadword Integers (not supported: AVX-512)
• vpmovm2w — Expand Bits of Mask Register to Packed Word Integers (not supported: AVX-512)
• vpmovq2m — Move Signs of Packed Quadword Integers to Mask Register (not supported: AVX-512)
• vpmovqb — Down Convert Packed Quadword Values to Byte Values with Truncation (not supported: AVX-512)
• vpmovqd — Down Convert Packed Quadword Values to Doubleword Values with Truncation (not supported: AVX-512)
• vpmovqw — Down Convert Packed Quadword Values to Word Values with Truncation (not supported: AVX-512)
• vpmovsdb — Down Convert Packed Doubleword Values to Byte Values with Signed Saturation (not supported: AVX-512)
• vpmovsdw — Down Convert Packed Doubleword Values to Word Values with Signed Saturation (not supported: AVX-512)
• vpmovsqb — Down Convert Packed Quadword Values to Byte Values with Signed Saturation (not supported: AVX-512)
• vpmovsqd — Down Convert Packed Quadword Values to Doubleword Values with Signed Saturation (not supported: AVX-512)
• vpmovsqw — Down Convert Packed Quadword Values to Word Values with Signed Saturation (not supported: AVX-512)
• vpmovswb — Down Convert Packed Word Values to Byte Values with Signed Saturation (not supported: AVX-512)
• vpmovsxbd — Move Packed Byte Integers to Doubleword Integers with Sign Extension
• vpmovsxbq — Move Packed Byte Integers to Quadword Integers with Sign Extension
• vpmovsxbw — Move Packed Byte Integers to Word Integers with Sign Extension
• vpmovsxdq — Move Packed Doubleword Integers to Quadword Integers with Sign Extension
• vpmovsxwd — Move Packed Word Integers to Doubleword Integers with Sign Extension
• vpmovsxwq — Move Packed Word Integers to Quadword Integers with Sign Extension
• vpmovusdb — Down Convert Packed Doubleword Values to Byte Values with Unsigned Saturation (not supported: AVX-512)
• vpmovusdw — Down Convert Packed Doubleword Values to Word Values with Unsigned Saturation (not supported: AVX-512)
• vpmovusqb — Down Convert Packed Quadword Values to Byte Values with Unsigned Saturation (not supported: AVX-512)
• vpmovusqd — Down Convert Packed Quadword Values to Doubleword Values with Unsigned Saturation (not supported: AVX-512)
• vpmovusqw — Down Convert Packed Quadword Values to Word Values with Unsigned Saturation (not supported: AVX-512)
• vpmovuswb — Down Convert Packed Word Values to Byte Values with Unsigned Saturation (not supported: AVX-512)
• vpmovw2m — Move Signs of Packed Word Integers to Mask Register (not supported: AVX-512)
• vpmovwb — Down Convert Packed Word Values to Byte Values with Truncation (not supported: AVX-512)
• vpmovzxbd — Move Packed Byte Integers to Doubleword Integers with Zero Extension
• vpmovzxbq — Move Packed Byte Integers to Quadword Integers with Zero Extension
• vpmovzxbw — Move Packed Byte Integers to Word Integers with Zero Extension
• vpmovzxdq — Move Packed Doubleword Integers to Quadword Integers with Zero Extension
• vpmovzxwd — Move Packed Word Integers to Doubleword Integers with Zero Extension
• vpmovzxwq — Move Packed Word Integers to Quadword Integers with Zero Extension
• vpmuldq — Multiply Packed Signed Doubleword Integers and Store Quadword Result
• vpmulhrsw — Packed Multiply Signed Word Integers and Store High Result with Round and Scale
• vpmulhuw — Multiply Packed Unsigned Word Integers and Store High Result
• vpmulhw — Multiply Packed Signed Word Integers and Store High Result
• vpmulld — Multiply Packed Signed Doubleword Integers and Store Low Result
• vpmullq — Multiply Packed Signed Quadword Integers and Store Low Result (not supported: AVX-512)
• vpmullw — Multiply Packed Signed Word Integers and Store Low Result
• vpmultishiftqb — Select Packed Unaligned Bytes from Quadword Sources (not supported: AVX-512)
• vpmuludq — Multiply Packed Unsigned Doubleword Integers
• vpord — Bitwise Logical OR of Packed Doubleword Integers (not supported: AVX-512)
• vporq — Bitwise Logical OR of Packed Quadword Integers (not supported: AVX-512)
• vprold — Rotate Packed Doubleword Left (not supported: AVX-512)
• vprolq — Rotate Packed Quadword Left (not supported: AVX-512)
• vprolvd — Variable Rotate Packed Doubleword Left (not supported: AVX-512)
• vprolvq — Variable Rotate Packed Quadword Left (not supported: AVX-512)
• vprord — Rotate Packed Doubleword Right (not supported: AVX-512)
• vprorq — Rotate Packed Quadword Right (not supported: AVX-512)
• vprorvd — Variable Rotate Packed Doubleword Right (not supported: AVX-512)
• vprorvq — Variable Rotate Packed Quadword Right (not supported: AVX-512)
• vpsadbw — Compute Sum of Absolute Differences
• vpscatterdd — Scatter Packed Doubleword Values with Signed Doubleword Indices (not supported: AVX-512)
• vpscatterdq — Scatter Packed Quadword Values with Signed Doubleword Indices (not supported: AVX-512)
• vpscatterqd — Scatter Packed Doubleword Values with Signed Quadword Indices (not supported: AVX-512)
• vpscatterqq — Scatter Packed Quadword Values with Signed Quadword Indices (not supported: AVX-512)
• vpshufb — Packed Shuffle Bytes
• vpshufd — Shuffle Packed Doublewords
• vpshufhw — Shuffle Packed High Words
• vpshuflw — Shuffle Packed Low Words
• vpslld — Shift Packed Doubleword Data Left Logical
• vpslldq — Shift Packed Double Quadword Left Logical
• vpsllq — Shift Packed Quadword Data Left Logical
• vpsllvd — Variable Shift Packed Doubleword Data Left Logical
• vpsllvq — Variable Shift Packed Quadword Data Left Logical
• vpsllvw — Variable Shift Packed Word Data Left Logical (not supported: AVX-512)
• vpsllw — Shift Packed Word Data Left Logical
• vpsrad — Shift Packed Doubleword Data Right Arithmetic
• vpsraq — Shift Packed Quadword Data Right Arithmetic (not supported: AVX-512)
• vpsravd — Variable Shift Packed Doubleword Data Right Arithmetic
• vpsravq — Variable Shift Packed Quadword Data Right Arithmetic (not supported: AVX-512)
• vpsravw — Variable Shift Packed Word Data Right Arithmetic (not supported: AVX-512)
• vpsraw — Shift Packed Word Data Right Arithmetic
• vpsrld — Shift Packed Doubleword Data Right Logical
• vpsrldq — Shift Packed Double Quadword Right Logical
• vpsrlq — Shift Packed Quadword Data Right Logical
• vpsrlvd — Variable Shift Packed Doubleword Data Right Logical
• vpsrlvq — Variable Shift Packed Quadword Data Right Logical
• vpsrlvw — Variable Shift Packed Word Data Right Logical (not supported: AVX-512)
• vpsrlw — Shift Packed Word Data Right Logical
• vpsubb — Subtract Packed Byte Integers
• vpsubd — Subtract Packed Doubleword Integers
• vpsubq — Subtract Packed Quadword Integers
• vpsubsb — Subtract Packed Signed Byte Integers with Signed Saturation
• vpsubsw — Subtract Packed Signed Word Integers with Signed Saturation
• vpsubusb — Subtract Packed Unsigned Byte Integers with Unsigned Saturation
• vpsubusw — Subtract Packed Unsigned Word Integers with Unsigned Saturation
• vpsubw — Subtract Packed Word Integers
• vpternlogd — Bitwise Ternary Logical Operation on Doubleword Values (not supported: AVX-512)
• vpternlogq — Bitwise Ternary Logical Operation on Quadword Values (not supported: AVX-512)
• vptestmb — Logical AND of Packed Byte Integer Values and Set Mask (not supported: AVX-512)
• vptestmd — Logical AND of Packed Doubleword Integer Values and Set Mask (not supported: AVX-512)
• vptestmq — Logical AND of Packed Quadword Integer Values and Set Mask (not supported: AVX-512)
• vptestmw — Logical AND of Packed Word Integer Values and Set Mask (not supported: AVX-512)
• vptestnmb — Logical NAND of Packed Byte Integer Values and Set Mask (not supported: AVX-512)
• vptestnmd — Logical NAND of Packed Doubleword Integer Values and Set Mask (not supported: AVX-512)
• vptestnmq — Logical NAND of Packed Quadword Integer Values and Set Mask (not supported: AVX-512)
• vptestnmw — Logical NAND of Packed Word Integer Values and Set Mask (not supported: AVX-512)
• vpunpckhbw — Unpack and Interleave High-Order Bytes into Words
• vpunpckhdq — Unpack and Interleave High-Order Doublewords into Quadwords
• vpunpckhqdq — Unpack and Interleave High-Order Quadwords into Double Quadwords
• vpunpckhwd — Unpack and Interleave High-Order Words into Doublewords
• vpunpcklbw — Unpack and Interleave Low-Order Bytes into Words
• vpunpckldq — Unpack and Interleave Low-Order Doublewords into Quadwords
• vpunpcklqdq — Unpack and Interleave Low-Order Quadwords into Double Quadwords
• vpunpcklwd — Unpack and Interleave Low-Order Words into Doublewords
• vpxord — Bitwise Logical Exclusive OR of Packed Doubleword Integers (not supported: AVX-512)
• vpxorq — Bitwise Logical Exclusive OR of Packed Quadword Integers (not supported: AVX-512)
• vrangepd — Range Restriction Calculation For Packed Pairs of Double-Precision Floating-Point Values (not supported: AVX-512)
• vrangeps — Range Restriction Calculation For Packed Pairs of Single-Precision Floating-Point Values (not supported: AVX-512)
• vrangesd — Range Restriction Calculation For a pair of Scalar Double-Precision Floating-Point Values (not supported: AVX-512)
• vrangess — Range Restriction Calculation For a pair of Scalar Single-Precision Floating-Point Values (not supported: AVX-512)
• vrcp14pd — Compute Approximate Reciprocals of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vrcp14ps — Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vrcp14sd — Compute Approximate Reciprocal of a Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vrcp14ss — Compute Approximate Reciprocal of a Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vrcp28pd — Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrcp28ps — Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrcp28sd — Approximation to the Reciprocal of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrcp28ss — Approximation to the Reciprocal of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vreducepd — Perform Reduction Transformation on Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vreduceps — Perform Reduction Transformation on Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vreducesd — Perform Reduction Transformation on a Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vreducess — Perform Reduction Transformation on a Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vrndscalepd — Round Packed Double-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrndscaleph — Round Packed Half-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrndscaleps — Round Packed Single-Precision Floating-Point Values To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrndscalesd — Round Scalar Double-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrndscalesh — Round Scalar Half-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrndscaless — Round Scalar Single-Precision Floating-Point Value To Include A Given Number Of Fraction Bits (not supported: AVX-512)
• vrsqrt14pd — Compute Approximate Reciprocals of Square Roots of Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vrsqrt14ps — Compute Approximate Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vrsqrt14sd — Compute Approximate Reciprocal of a Square Root of a Scalar Double-Precision Floating-Point Value (not supported: AVX-512)
• vrsqrt14ss — Compute Approximate Reciprocal of a Square Root of a Scalar Single-Precision Floating-Point Value (not supported: AVX-512)
• vrsqrt28pd — Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrsqrt28ps — Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrsqrt28sd — Approximation to the Reciprocal Square Root of a Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vrsqrt28ss — Approximation to the Reciprocal Square Root of a Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error (not supported: AVX-512)
• vscalefpd — Scale Packed Double-Precision Floating-Point Values With Double-Precision Floating-Point Values (not supported: AVX-512)
• vscalefps — Scale Packed Single-Precision Floating-Point Values With Single-Precision Floating-Point Values (not supported: AVX-512)
• vscalefsd — Scale Scalar Double-Precision Floating-Point Value With a Double-Precision Floating-Point Value (not supported: AVX-512)
• vscalefss — Scale Scalar Single-Precision Floating-Point Value With a Single-Precision Floating-Point Value (not supported: AVX-512)
• vscatterdpd — Scatter Packed Double-Precision Floating-Point Values with Signed Doubleword Indices (not supported: AVX-512)
• vscatterdps — Scatter Packed Single-Precision Floating-Point Values with Signed Doubleword Indices (not supported: AVX-512)
• vscatterpf0dpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf0dps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T0 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf0qpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf0qps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T0 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf1dpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf1dps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Doubleword Indices Using T1 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf1qpd — Sparse Prefetch Packed Double-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint with Intent to Write (not supported: AVX-512)
• vscatterpf1qps — Sparse Prefetch Packed Single-Precision Floating-Point Data Values with Signed Quadword Indices Using T1 Hint with Intent to Write (not supported: AVX-512)
• vscatterqpd — Scatter Packed Double-Precision Floating-Point Values with Signed Quadword Indices (not supported: AVX-512)
• vscatterqps — Scatter Packed Single-Precision Floating-Point Values with Signed Quadword Indices (not supported: AVX-512)
• vshuff32x4 — Shuffle 128-Bit Packed Single-Precision Floating-Point Values (not supported: AVX-512)
• vshuff64x2 — Shuffle 128-Bit Packed Double-Precision Floating-Point Values (not supported: AVX-512)
• vshufi32x4 — Shuffle 128-Bit Packed Doubleword Integer Values (not supported: AVX-512)
• vshufi64x2 — Shuffle 128-Bit Packed Quadword Integer Values (not supported: AVX-512)
• vshufpd — Shuffle Packed Double-Precision Floating-Point Values
• vshufps — Shuffle Packed Single-Precision Floating-Point Values
• vsqrtpd — Compute Square Roots of Packed Double-Precision Floating-Point Values
• vsqrtps — Compute Square Roots of Packed Single-Precision Floating-Point Values
• vsubpd — Subtract Packed Double-Precision Floating-Point Values
• vsubps — Subtract Packed Single-Precision Floating-Point Values
• vunpckhpd — Unpack and Interleave High Packed Double-Precision Floating-Point Values
• vunpckhps — Unpack and Interleave High Packed Single-Precision Floating-Point Values
• vunpcklpd — Unpack and Interleave Low Packed Double-Precision Floating-Point Values
• vunpcklps — Unpack and Interleave Low Packed Single-Precision Floating-Point Values
• vxorpd — Bitwise Logical XOR for Double-Precision Floating-Point Values
• vxorps — Bitwise Logical XOR for Single-Precision Floating-Point Values

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• addb
• addd
• addq
• addw
• andb
• andd
• andnb
• andnd
• andnq
• andnw
• andq
• andw
• kadd
• kaddb — ADD Two 8-bit Masks
• kaddd — ADD Two 32-bit Masks
• kaddq — ADD Two 64-bit Masks
• kaddw — ADD Two 16-bit Masks
• kand
• kandb — Bitwise Logical AND 8-bit Masks
• kandd — Bitwise Logical AND 32-bit Masks
• kandn
• kandnb — Bitwise Logical AND NOT 8-bit Masks
• kandnd — Bitwise Logical AND NOT 32-bit Masks
• kandnq — Bitwise Logical AND NOT 64-bit Masks
• kandnw — Bitwise Logical AND NOT 16-bit Masks
• kandq — Bitwise Logical AND 64-bit Masks
• kandw — Bitwise Logical AND 16-bit Masks
• kmov
• kmovb — Move 8-bit Mask
• kmovd — Move 32-bit Mask
• kmovq — Move 64-bit Mask
• kmovw — Move 16-bit Mask
• knot
• knotb — NOT 8-bit Mask Register
• knotd — NOT 32-bit Mask Register
• knotq — NOT 64-bit Mask Register
• knotw — NOT 16-bit Mask Register
• kor
• korb — Bitwise Logical OR 8-bit Masks
• kord — Bitwise Logical OR 32-bit Masks
• korq — Bitwise Logical OR 64-bit Masks
• kortest
• kortestb — OR 8-bit Masks and Set Flags
• kortestd — OR 32-bit Masks and Set Flags
• kortestq — OR 64-bit Masks and Set Flags
• kortestw — OR 16-bit Masks and Set Flags
• korw — Bitwise Logical OR 16-bit Masks
• kshiftl
• kshiftlb — Shift Left 8-bit Masks
• kshiftld — Shift Left 32-bit Masks
• kshiftlq — Shift Left 64-bit Masks
• kshiftlw — Shift Left 16-bit Masks
• kshiftr
• kshiftrb — Shift Right 8-bit Masks
• kshiftrd — Shift Right 32-bit Masks
• kshiftrq — Shift Right 64-bit Masks
• kshiftrw — Shift Right 16-bit Masks
• kshl
• kshlb
• kshld
• kshlq
• kshlw
• kshr
• kshrb
• kshrd
• kshrq
• kshrw
• ktest
• ktestb — Bit Test 8-bit Masks and Set Flags
• ktestd — Bit Test 32-bit Masks and Set Flags
• ktestq — Bit Test 64-bit Masks and Set Flags
• ktestw — Bit Test 16-bit Masks and Set Flags
• kunpck
• kunpckbw — Unpack and Interleave 8-bit Masks
• kunpckd
• kunpckdq — Unpack and Interleave 32-bit Masks
• kunpckq
• kunpckw
• kunpckwd — Unpack and Interleave 16-bit Masks
• kxnor
• kxnorb — Bitwise Logical XNOR 8-bit Masks
• kxnord — Bitwise Logical XNOR 32-bit Masks
• kxnorq — Bitwise Logical XNOR 64-bit Masks
• kxnorw — Bitwise Logical XNOR 16-bit Masks
• kxor
• kxorb — Bitwise Logical XOR 8-bit Masks
• kxord — Bitwise Logical XOR 32-bit Masks
• kxorq — Bitwise Logical XOR 64-bit Masks
• kxorw — Bitwise Logical XOR 16-bit Masks
• movb
• movw
• notb
• notd
• notq
• notw
• orb
• ord
• orq
• ortest
• ortestb
• ortestd
• ortestq
• ortestw
• orw
• shiftl
• shiftlb
• shiftld
• shiftlq
• shiftlw
• shiftr
• shiftrb
• shiftrd
• shiftrq
• shiftrw
• shlb
• shlq
• shlw
• shrb
• shrq
• shrw
• testb
• testd
• testq
• testw
• unpck
• unpckbw
• unpckd
• unpckdq
• unpckq
• unpckw
• unpckwd
• xnor
• xnorb
• xnord
• xnorq
• xnorw
• xorb
• xord
• xorq
• xorw

This emulator does not support AVX10. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vaddbf16
• vcmpbf16
• vcomisbf16
• vdivbf16
• vfmadd132bf16
• vfmadd213bf16
• vfmadd231bf16
• vfmsub132bf16
• vfmsub213bf16
• vfmsub231bf16
• vfnmadd132bf16
• vfnmadd213bf16
• vfnmadd231bf16
• vfnmsub132bf16
• vfnmsub213bf16
• vfnmsub231bf16
• vfpclassbf16
• vgetexpbf16
• vgetmantbf16
• vmaxbf16
• vminbf16
• vmulbf16
• vrcpbf16
• vreducebf16
• vrndscalebf16
• vrsqrtbf16
• vscalefbf16
• vsqrtbf16
• vsubbf16

This emulator does not support AVX10. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vcomxsd
• vcomxsh
• vcomxss
• vucomxsd
• vucomxsh
• vucomxss

This emulator does not support AVX10. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vcvt2ph2bf8
• vcvt2ph2bf8s
• vcvt2ph2hf8
• vcvt2ph2hf8s
• vcvt2ps2phx
• vcvtbiasph2bf8
• vcvtbiasph2bf8s
• vcvtbiasph2hf8
• vcvtbiasph2hf8s
• vcvthf82ph
• vcvtph2bf8
• vcvtph2bf8s
• vcvtph2hf8
• vcvtph2hf8s

The AVX10 and AVX-VNNI forms of these instructions are not supported by this emulator; the other forms run.

• vdpphps (not supported: AVX10)
• vmpsadbw — Compute Multiple Packed Sums of Absolute Difference
• vpdpbssd — Packed Dot Product of Signed-by-Signed Byte subvectors into Doubleword (not supported: AVX-VNNI and AVX10)
• vpdpbssds — Packed Dot Product of Signed-by-Signed Byte subvectors into Doubleword with Saturation (not supported: AVX-VNNI and AVX10)
• vpdpbsud — Packed Dot Product of Signed-by-Unsinged Byte subvectors into Doubleword (not supported: AVX-VNNI and AVX10)
• vpdpbsuds — Packed Dot Product of Signed-by-Unsinged Byte subvectors into Doubleword with Saturation (not supported: AVX-VNNI and AVX10)
• vpdpbuud — Packed Dot Product of Unsigned-by-Unsinged Byte subvectors into Doubleword (not supported: AVX-VNNI and AVX10)
• vpdpbuuds — Packed Dot Product of Unsigned-by-Unsinged Byte subvectors into Doubleword with Saturation (not supported: AVX-VNNI and AVX10)
• vpdpwsud — Packed Dot Product of Signed-by-Unsigned Word subvectors into Doubleword (not supported: AVX10)
• vpdpwsuds — Packed Dot Product of Signed-by-Unsigned Word subvectors into Doubleword with Saturation (not supported: AVX10)
• vpdpwusd — Packed Dot Product of Unsigned-by-Signed Word subvectors into Doubleword (not supported: AVX10)
• vpdpwusds — Packed Dot Product of Unsigned-by-Signed Word subvectors into Doubleword with Saturation (not supported: AVX10)
• vpdpwuud — Packed Dot Product of Unsigned-by-Unsigned Word subvectors into Doubleword (not supported: AVX10)
• vpdpwuuds — Packed Dot Product of Unsigned-by-Unsigned Word subvectors into Doubleword with Saturation (not supported: AVX10)

This emulator does not support AVX10. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vminmaxbf16
• vminmaxpd
• vminmaxph
• vminmaxps
• vminmaxsd
• vminmaxsh
• vminmaxss

This emulator does not support AVX10. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vcvtbf162ibs
• vcvtbf162iubs
• vcvtph2ibs
• vcvtph2iubs
• vcvtps2ibs
• vcvtps2iubs
• vcvttbf162ibs
• vcvttbf162iubs
• vcvttpd2dqs
• vcvttpd2qqs
• vcvttpd2udqs
• vcvttpd2uqqs
• vcvttph2ibs
• vcvttph2iubs
• vcvttps2dqs
• vcvttps2ibs
• vcvttps2iubs
• vcvttps2qqs
• vcvttps2udqs
• vcvttps2uqqs
• vcvttsd2sis
• vcvttsd2usis
• vcvttss2sis
• vcvttss2usis

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• v4dpwssd
• v4dpwssds

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• v4fmaddps
• v4fmaddss
• v4fnmaddps
• v4fnmaddss

This emulator does not support AVX-512 and AVX-NE-CONVERT. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vcvtne2ps2bf16 — Convert with Nearest-Even rounding 2 Single-Precision FP vectors into BFloat16 FP vector
• vcvtneps2bf16 — Convert with Nearest-Even rounding a Single-Precision FP vector into a BFloat16 FP vector
• vdpbf16ps — Packed Dot Product of BFloat16 FP subvectors into Single-Precision FP values

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vpopcntb — Packed Population Count for Byte Integers
• vpopcntd — Packed Population Count for Doubleword Integers
• vpopcntq — Packed Population Count for Quadword Integers
• vpopcntw — Packed Population Count for Word Integers
• vpshufbitqmb — Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vp2intersectd
• vp2intersectq

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vpcompressb — Store Sparse Packed Byte Integer Values into Dense Memory/Register
• vpcompressw — Store Sparse Packed Word Integer Values into Dense Memory/Register
• vpexpandb — Load Sparse Packed Byte Integer Values from Dense Memory/Register
• vpexpandw — Load Sparse Packed Word Integer Values from Dense Memory/Register
• vpshldd — Concatenate and Shift Packed Doubleword Data Left Logical
• vpshldq — Concatenate and Shift Packed Quadword Data Left Logical
• vpshldvd — Concatenate and Variable Shift Packed Doubleword Data Left Logical
• vpshldvq — Concatenate and Variable Shift Packed Quadword Data Left Logical
• vpshldvw — Concatenate and Variable Shift Packed Word Data Left Logical
• vpshldw — Concatenate and Shift Packed Word Data Left Logical
• vpshrdd — Concatenate and Shift Packed Doubleword Data Right Logical
• vpshrdq — Concatenate and Shift Packed Quadword Data Right Logical
• vpshrdvd — Concatenate and Variable Shift Packed Doubleword Data Right Logical
• vpshrdvq — Concatenate and Variable Shift Packed Quadword Data Right Logical
• vpshrdvw — Concatenate and Variable Shift Packed Word Data Right Logical
• vpshrdw — Concatenate and Shift Packed Word Data Right Logical

This emulator does not support AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vpdpbusd — Packed Dot Product of Unsigned-by-Signed Byte subvectors into Doubleword
• vpdpbusds — Packed Dot Product of Unsigned-by-Signed Byte subvectors into Doubleword with Saturation
• vpdpwssd — Packed Dot Product of Signed-by-Signed Word subvectors into Doubleword
• vpdpwssds — Packed Dot Product of Signed-by-Signed Word subvectors into Doubleword with Saturation

The AVX-512 and TBM forms of these instructions are not supported by this emulator; the other forms run.

• andn — Logical AND NOT
• bextr — Bit Field Extract
• blsi — Isolate Lowest Set Bit
• blsmsk — Mask From Lowest Set Bit
• blsr — Reset Lowest Set Bit
• bzhi — Zero High Bits Starting with Specified Bit Position
• lzcnt — Count the Number of Leading Zero Bits
• pdep — Parallel Bits Deposit
• pext — Parallel Bits Extract
• tzcnt — Count the Number of Trailing Zero Bits

The APX forms of these instructions are not supported by this emulator.

• cfcmova (APX)
• cfcmovae (APX)
• cfcmovb (APX)
• cfcmovbe (APX)
• cfcmovc (APX)
• cfcmove (APX)
• cfcmovg (APX)
• cfcmovge (APX)
• cfcmovl (APX)
• cfcmovle (APX)
• cfcmovna (APX)
• cfcmovnae (APX)
• cfcmovnb (APX)
• cfcmovnbe (APX)
• cfcmovnc (APX)
• cfcmovne (APX)
• cfcmovng (APX)
• cfcmovnge (APX)
• cfcmovnl (APX)
• cfcmovnle (APX)
• cfcmovno (APX)
• cfcmovnp (APX)
• cfcmovns (APX)
• cfcmovnz (APX)
• cfcmovo (APX)
• cfcmovp (APX)
• cfcmovpe (APX)
• cfcmovpo (APX)
• cfcmovs (APX)
• cfcmovz (APX)
• cmpaexadd (CMPCCXADD)
• cmpaxadd (CMPCCXADD)
• cmpbexadd — Compare for Below or Equals and Add (CMPCCXADD)
• cmpbxadd — Compare for Below and Add (CMPCCXADD)
• cmpcxadd (CMPCCXADD)
• cmpexadd (CMPCCXADD)
• cmpgexadd (CMPCCXADD)
• cmpgxadd (CMPCCXADD)
• cmplexadd — Compare for Less or Equals and Add (CMPCCXADD)
• cmplxadd — Compare for Less and Add (CMPCCXADD)
• cmpnaexadd (CMPCCXADD)
• cmpnaxadd (CMPCCXADD)
• cmpnbexadd — Compare for Not Below or Equals and Add (CMPCCXADD)
• cmpnbxadd — Compare for Not Below and Add (CMPCCXADD)
• cmpncxadd (CMPCCXADD)
• cmpnexadd (CMPCCXADD)
• cmpngexadd (CMPCCXADD)
• cmpngxadd (CMPCCXADD)
• cmpnlexadd — Compare for Not Less or Equals and Add (CMPCCXADD)
• cmpnlxadd — Compare for Not Less and Add (CMPCCXADD)
• cmpnoxadd — Compare for Not Overflow and Add (CMPCCXADD)
• cmpnpxadd — Compare for Not Parity and Add (CMPCCXADD)
• cmpnsxadd — Compare for Not Sign and Add (CMPCCXADD)
• cmpnzxadd — Compare for Not Zero and Add (CMPCCXADD)
• cmpoxadd — Compare for Overflow and Add (CMPCCXADD)
• cmppexadd (CMPCCXADD)
• cmppoxadd (CMPCCXADD)
• cmppxadd — Compare for Parity and Add (CMPCCXADD)
• cmpsxadd — Compare for Sign and Add (CMPCCXADD)
• cmpzxadd — Compare for Zero and Add (CMPCCXADD)
• setaezu (APX)
• setazu (APX)
• setbezu (APX)
• setbzu (APX)
• setczu (APX)
• setezu (APX)
• setgezu (APX)
• setgzu (APX)
• setlezu (APX)
• setlzu (APX)
• setnaezu (APX)
• setnazu (APX)
• setnbezu (APX)
• setnbzu (APX)
• setnczu (APX)
• setnezu (APX)
• setngezu (APX)
• setngzu (APX)
• setnlezu (APX)
• setnlzu (APX)
• setnozu (APX)
• setnpzu (APX)
• setnszu (APX)
• setnzzu (APX)
• setozu (APX)
• setpezu (APX)
• setpozu (APX)
• setpzu (APX)
• setszu (APX)
• setzzu (APX)

The MOVDIRI forms of these instructions are not supported by this emulator; the other forms run.

• cldemote — Cache Line Demote
• movdir64b — MOVe to DIRect store 64 Bytes
• movdiri — MOVe to DIRect store Integer (not supported: MOVDIRI)
• pconfig

• pbndkb
• prefetchrst2

The APX forms of these instructions are not supported by this emulator.

• invept
• invvpid

• clac (SMAP)
• stac (SMAP)

This emulator does not support GFNI and AVX-512. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• gf2p8affineinvqb — Galois Field (2^8) Affine Inverse Transformation
• gf2p8affineqb — Galois Field (2^8) Affine Transformation
• gf2p8mulb — Galois Field Multiply Bytes
• vgf2p8affineinvqb — Galois Field (2^8) Affine Inverse Transformation
• vgf2p8affineqb — Galois Field (2^8) Affine Transformation
• vgf2p8mulb — Galois Field Multiply Bytes

• prefetchit0 — Prefetch Code Into Instruction Caches using IT0 Hint
• prefetchit1 — Prefetch Code Into Instruction Caches using IT1 Hint
• prefetchnta — Prefetch Data Into Caches using NTA Hint
• prefetcht0 — Prefetch Data Into Caches using T0 Hint
• prefetcht1 — Prefetch Data Into Caches using T1 Hint
• prefetcht2 — Prefetch Data Into Caches using T2 Hint

This emulator does not support 3DNow!. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• pfrcpv
• pfrsqrtv

• hreset

• in
• out

• enqcmd
• enqcmds
• xresldtrk
• xsusldtrk

The AMX forms of these instructions are not supported by this emulator; the other forms run.

• ldtilecfg — LoaD TILE ConFiGuration (not supported: AMX)
• sttilecfg — STore TILE ConFiGuration (not supported: AMX)
• t2rpntlvwz0
• t2rpntlvwz0rs
• t2rpntlvwz0rst1
• t2rpntlvwz0t1
• t2rpntlvwz1
• t2rpntlvwz1rs
• t2rpntlvwz1rst1
• t2rpntlvwz1t1
• tcmmimfp16ps — Tile Complex Matrix Multiply IMaginary part of FP16 tiles with Packed Single-precision accumulation
• tcmmrlfp16ps — Tile Complex Matrix Multiply ReaL part of FP16 tiles with Packed Single-precision accumulation
• tconjtcmmimfp16ps
• tconjtfp16
• tcvtrowd2ps
• tcvtrowps2bf16h
• tcvtrowps2bf16l
• tcvtrowps2phh
• tcvtrowps2phl
• tdpbf16ps — Tile Dot Product of BF16 tiles with Packed Single-precision accumulation (not supported: AMX)
• tdpbf8ps
• tdpbhf8ps
• tdpbssd — Tile Dot Product of Signed bytes by Signed bytes with Doubleword accumulation (not supported: AMX)
• tdpbsud — Tile Dot Product of Signed bytes by Unsigned bytes with Doubleword accumulation (not supported: AMX)
• tdpbusd — Tile Dot Product of Unsigned bytes by Signed bytes with Doubleword accumulation (not supported: AMX)
• tdpbuud — Tile Dot Product of Unsigned bytes by Unsigned bytes with Doubleword accumulation (not supported: AMX)
• tdpfp16ps — Tile Dot Product of FP16 tiles with Packed Single-precision accumulation (not supported: AMX)
• tdphbf8ps
• tdphf8ps
• tileloadd — TILE LOAD Data (not supported: AMX)
• tileloaddrs (not supported: AMX)
• tileloaddrst1 (not supported: AMX)
• tileloaddt1 — TILE LOAD Data with T1 caching hint (not supported: AMX)
• tilemovrow
• tilerelease — TILE RELEASE register state (not supported: AMX)
• tilestored — TILE STORE Data (not supported: AMX)
• tilezero — TILE ZERO data (not supported: AMX)
• tmmultf32ps
• ttcmmimfp16ps
• ttcmmrlfp16ps
• ttdpbf16ps
• ttdpfp16ps
• ttmmultf32ps
• ttransposed

This emulator runs AES only in its v form. Write vaesdec, not aesdec: the encodings without the v prefix stop the program with SIGILL, an illegal instruction.

• aesdec — Perform One Round of an AES Decryption Flow
• aesdeclast — Perform Last Round of an AES Decryption Flow
• aesenc — Perform One Round of an AES Encryption Flow
• aesenclast — Perform Last Round of an AES Encryption Flow
• aesimc — Perform the AES InvMixColumn Transformation
• aeskeygenassist — AES Round Key Generation Assist

• aesdec128kl
• aesdec256kl
• aesdecwide128kl
• aesdecwide256kl
• aesenc128kl
• aesenc256kl
• aesencwide128kl
• aesencwide256kl
• encodekey128
• encodekey256
• loadiwkey

AES and carry-less multiplication

• vaesimc — Perform the AES InvMixColumn Transformation
• vaeskeygenassist — AES Round Key Generation Assist

The AVX-512 and 256-bit AES and carry-less multiplication forms of these instructions are not supported by this emulator; the other forms run.

Compare, minimum and maximum

• vmaxsh — Return Maximum Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vminsh — Return Minimum Scalar Half-Precision Floating-Point Value (not supported: AVX-512)

AES and carry-less multiplication

• vpclmulhqhqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• vpclmulhqlqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• vpclmullqhqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• vpclmullqlqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• vpclmulqdq — Carry-Less Quadword Multiplication

Other

• vfcmulcph — Fused Conjugate Multiply of Complex Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmadd132sh (not supported: AVX-512)
• vfmadd213sh (not supported: AVX-512)
• vfmadd231sh (not supported: AVX-512)
• vfmsub132sh — Fused Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsub213sh — Fused Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsub231sh — Fused Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmulcph — Fused Fused Multiply of Complex Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmadd132sh (not supported: AVX-512)
• vfnmadd213sh (not supported: AVX-512)
• vfnmadd231sh (not supported: AVX-512)
• vfnmsub132sh — Fused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmsub213sh — Fused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmsub231sh — Fused Negative Multiply-Subtract of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)

The AVX-512 and AVX10 forms of these instructions are not supported by this emulator; the other forms run.

Moves, loads and stores

• vlddqu — Load Unaligned Integer 128 Bits
• vldqqu — Load Unaligned Integer 256 Bits
• vmovd — Move Doubleword
• vmovdqa — Move Aligned Double Quadword
• vmovdqu — Move Unaligned Double Quadword
• vmovhpd — Move High Packed Double-Precision Floating-Point Value
• vmovhps — Move High Packed Single-Precision Floating-Point Values
• vmovlpd — Move Low Packed Double-Precision Floating-Point Value
• vmovlps — Move Low Packed Single-Precision Floating-Point Values
• vmovntqq — Store Quad Quadword (256 Bits) Using Non-Temporal Hint
• vmovq — Move Quadword
• vmovqqa — Move Aligned Quad Quadword (256 Bits)
• vmovqqu — Move Unaligned Quad Quadword (256 Bits)
• vmovsd — Move Scalar Double-Precision Floating-Point Value
• vmovss — Move Scalar Single-Precision Floating-Point Values

Arithmetic

• vaddsd — Add Scalar Double-Precision Floating-Point Values
• vaddss — Add Scalar Single-Precision Floating-Point Values
• vaddsubpd — Packed Double-FP Add/Subtract
• vaddsubps — Packed Single-FP Add/Subtract
• vdivsd — Divide Scalar Double-Precision Floating-Point Values
• vdivss — Divide Scalar Single-Precision Floating-Point Values
• vdppd — Dot Product of Packed Double Precision Floating-Point Values
• vdpps — Dot Product of Packed Single Precision Floating-Point Values
• vhaddpd — Packed Double-FP Horizontal Add
• vhaddps — Packed Single-FP Horizontal Add
• vhsubpd — Packed Double-FP Horizontal Subtract
• vhsubps — Packed Single-FP Horizontal Subtract
• vmulsd — Multiply Scalar Double-Precision Floating-Point Values
• vmulss — Multiply Scalar Single-Precision Floating-Point Values
• vphaddd — Packed Horizontal Add Doubleword Integer
• vphaddsw — Packed Horizontal Add Signed Word Integers with Signed Saturation
• vphaddw — Packed Horizontal Add Word Integers
• vphsubd — Packed Horizontal Subtract Doubleword Integers
• vphsubsw — Packed Horizontal Subtract Signed Word Integers with Signed Saturation
• vphsubw — Packed Horizontal Subtract Word Integers
• vpsignb — Packed Sign of Byte Integers
• vpsignd — Packed Sign of Doubleword Integers
• vpsignw — Packed Sign of Word Integers
• vrcpps — Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values
• vrcpss — Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values
• vrsqrtps — Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
• vrsqrtss — Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
• vsqrtsd — Compute Square Root of Scalar Double-Precision Floating-Point Value
• vsqrtss — Compute Square Root of Scalar Single-Precision Floating-Point Value
• vsubsd — Subtract Scalar Double-Precision Floating-Point Values
• vsubss — Subtract Scalar Single-Precision Floating-Point Values

Logic

• vpand — Packed Bitwise Logical AND
• vpandn — Packed Bitwise Logical AND NOT
• vpor — Packed Bitwise Logical OR
• vpxor — Packed Bitwise Logical Exclusive OR

Compare, minimum and maximum

• vcmpsd — Compare Scalar Double-Precision Floating-Point Values
• vcmpss — Compare Scalar Single-Precision Floating-Point Values
• vcomisd — Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
• vcomiss — Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
• vmaxsd — Return Maximum Scalar Double-Precision Floating-Point Value
• vmaxss — Return Maximum Scalar Single-Precision Floating-Point Value
• vminsd — Return Minimum Scalar Double-Precision Floating-Point Value
• vminss — Return Minimum Scalar Single-Precision Floating-Point Value
• vphminposuw — Packed Horizontal Minimum of Unsigned Word Integers
• vptest — Packed Logical Compare
• vtestpd — Packed Double-Precision Floating-Point Bit Test
• vtestps — Packed Single-Precision Floating-Point Bit Test
• vucomisd — Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS
• vucomiss — Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS

Compares named by their predicate

• vcmpeq_ospd — Compare Packed Double-Precision Floating-Point Values for Equal (Ordered, Signaling)
• vcmpeq_osps — Compare Packed Single-Precision Floating-Point Values for Equal (Ordered, Signaling)
• vcmpeq_ossd — Compare Scalar Double-Precision Floating-Point Values for Equal (Ordered, Signaling)
• vcmpeq_osss — Compare Scalar Single-Precision Floating-Point Values for Equal (Ordered, Signaling)
• vcmpeq_uqsd — Compare Scalar Double-Precision Floating-Point Values for Equal (Unordered, Non-Signaling)
• vcmpeq_uqss — Compare Scalar Single-Precision Floating-Point Values for Equal (Unordered, Non-Signaling)
• vcmpeq_ussd — Compare Scalar Double-Precision Floating-Point Values for Equal (Unordered, Signaling)
• vcmpeq_usss — Compare Scalar Single-Precision Floating-Point Values for Equal (Unordered, Signaling)
• vcmpeqsd — Compare Scalar Double-Precision Floating-Point Values for Equal
• vcmpeqss — Compare Scalar Single-Precision Floating-Point Values for Equal
• vcmpfalse_oqsd — Compare Scalar Double-Precision Floating-Point Values for False (Ordered, Non-Signaling)
• vcmpfalse_oqss — Compare Scalar Single-Precision Floating-Point Values for False (Ordered, Non-Signaling)
• vcmpfalse_ossd — Compare Scalar Double-Precision Floating-Point Values for False (Ordered, Signaling)
• vcmpfalse_osss — Compare Scalar Single-Precision Floating-Point Values for False (Ordered, Signaling)
• vcmpfalsesd — Compare Scalar Double-Precision Floating-Point Values for False
• vcmpfalsess — Compare Scalar Single-Precision Floating-Point Values for False
• vcmpge_oqsd — Compare Scalar Double-Precision Floating-Point Values for Greater Than or Equal (Ordered, Non-Signaling)
• vcmpge_oqss — Compare Scalar Single-Precision Floating-Point Values for Greater Than or Equal (Ordered, Non-Signaling)
• vcmpge_ossd — Compare Scalar Double-Precision Floating-Point Values for Greater Than or Equal (Ordered, Signaling)
• vcmpge_osss — Compare Scalar Single-Precision Floating-Point Values for Greater Than or Equal (Ordered, Signaling)
• vcmpgesd — Compare Scalar Double-Precision Floating-Point Values for Greater Than or Equal
• vcmpgess — Compare Scalar Single-Precision Floating-Point Values for Greater Than or Equal
• vcmpgt_oqsd — Compare Scalar Double-Precision Floating-Point Values for Greater Than (Ordered, Non-Signaling)
• vcmpgt_oqss — Compare Scalar Single-Precision Floating-Point Values for Greater Than (Ordered, Non-Signaling)
• vcmpgt_ossd — Compare Scalar Double-Precision Floating-Point Values for Greater Than (Ordered, Signaling)
• vcmpgt_osss — Compare Scalar Single-Precision Floating-Point Values for Greater Than (Ordered, Signaling)
• vcmpgtsd — Compare Scalar Double-Precision Floating-Point Values for Greater Than
• vcmpgtss — Compare Scalar Single-Precision Floating-Point Values for Greater Than
• vcmple_oqsd — Compare Scalar Double-Precision Floating-Point Values for Less Than or Equal (Ordered, Non-Signaling)
• vcmple_oqss — Compare Scalar Single-Precision Floating-Point Values for Less Than or Equal (Ordered, Non-Signaling)
• vcmple_ossd — Compare Scalar Double-Precision Floating-Point Values for Less Than or Equal (Ordered, Signaling)
• vcmple_osss — Compare Scalar Single-Precision Floating-Point Values for Less Than or Equal (Ordered, Signaling)
• vcmplesd — Compare Scalar Double-Precision Floating-Point Values for Less Than or Equal
• vcmpless — Compare Scalar Single-Precision Floating-Point Values for Less Than or Equal
• vcmplt_oqsd — Compare Scalar Double-Precision Floating-Point Values for Less Than (Ordered, Non-Signaling)
• vcmplt_oqss — Compare Scalar Single-Precision Floating-Point Values for Less Than (Ordered, Non-Signaling)
• vcmplt_ossd — Compare Scalar Double-Precision Floating-Point Values for Less Than (Ordered, Signaling)
• vcmplt_osss — Compare Scalar Single-Precision Floating-Point Values for Less Than (Ordered, Signaling)
• vcmpltsd — Compare Scalar Double-Precision Floating-Point Values for Less Than
• vcmpltss — Compare Scalar Single-Precision Floating-Point Values for Less Than
• vcmpneq_oqsd — Compare Scalar Double-Precision Floating-Point Values for Not Equal (Ordered, Non-Signaling)
• vcmpneq_oqss — Compare Scalar Single-Precision Floating-Point Values for Not Equal (Ordered, Non-Signaling)
• vcmpneq_ossd — Compare Scalar Double-Precision Floating-Point Values for Not Equal (Ordered, Signaling)
• vcmpneq_osss — Compare Scalar Single-Precision Floating-Point Values for Not Equal (Ordered, Signaling)
• vcmpneq_uqsd — Compare Scalar Double-Precision Floating-Point Values for Not Equal (Unordered, Non-Signaling)
• vcmpneq_uqss — Compare Scalar Single-Precision Floating-Point Values for Not Equal (Unordered, Non-Signaling)
• vcmpneq_ussd — Compare Scalar Double-Precision Floating-Point Values for Not Equal (Unordered, Signaling)
• vcmpneq_usss — Compare Scalar Single-Precision Floating-Point Values for Not Equal (Unordered, Signaling)
• vcmpneqsd — Compare Scalar Double-Precision Floating-Point Values for Not Equal
• vcmpneqss — Compare Scalar Single-Precision Floating-Point Values for Not Equal
• vcmpnge_uqsd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Non-Signaling)
• vcmpnge_uqss — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Non-Signaling)
• vcmpnge_ussd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Signaling)
• vcmpnge_usss — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than or Equal (Unordered, Signaling)
• vcmpngesd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than or Equal
• vcmpngess — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than or Equal
• vcmpngt_uqsd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than (Unordered, Non-Signaling)
• vcmpngt_uqss — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than (Unordered, Non-Signaling)
• vcmpngt_ussd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than (Unordered, Signaling)
• vcmpngt_usss — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than (Unordered, Signaling)
• vcmpngtsd — Compare Scalar Double-Precision Floating-Point Values for Not Greater Than
• vcmpngtss — Compare Scalar Single-Precision Floating-Point Values for Not Greater Than
• vcmpnle_uqsd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Non-Signaling)
• vcmpnle_uqss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Non-Signaling)
• vcmpnle_ussd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Signaling)
• vcmpnle_usss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than or Equal (Unordered, Signaling)
• vcmpnlesd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than or Equal
• vcmpnless — Compare Scalar Single-Precision Floating-Point Values for Not Less Than or Equal
• vcmpnlt_uqsd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than (Unordered, Non-Signaling)
• vcmpnlt_uqss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than (Unordered, Non-Signaling)
• vcmpnlt_ussd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than (Unordered, Signaling)
• vcmpnlt_usss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than (Unordered, Signaling)
• vcmpnltsd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than
• vcmpnltss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than
• vcmpord_qsd — Compare Scalar Double-Precision Floating-Point Values for Ordered (Non-Signaling)
• vcmpord_qss — Compare Scalar Single-Precision Floating-Point Values for Ordered (Non-Signaling)
• vcmpord_ssd — Compare Scalar Double-Precision Floating-Point Values for Ordered (Signaling)
• vcmpord_sss — Compare Scalar Single-Precision Floating-Point Values for Ordered (Signaling)
• vcmpordsd — Compare Scalar Double-Precision Floating-Point Values for Ordered
• vcmpordss — Compare Scalar Single-Precision Floating-Point Values for Ordered
• vcmptrue_uqsd — Compare Scalar Double-Precision Floating-Point Values for True (Unordered, Non-Signaling)
• vcmptrue_uqss — Compare Scalar Single-Precision Floating-Point Values for True (Unordered, Non-Signaling)
• vcmptrue_ussd — Compare Scalar Double-Precision Floating-Point Values for True (Unordered, Signaling)
• vcmptrue_usss — Compare Scalar Single-Precision Floating-Point Values for True (Unordered, Signaling)
• vcmptruesd — Compare Scalar Double-Precision Floating-Point Values for True
• vcmptruess — Compare Scalar Single-Precision Floating-Point Values for True
• vcmpunord_qsd — Compare Scalar Double-Precision Floating-Point Values for Unordered (Non-Signaling)
• vcmpunord_qss — Compare Scalar Single-Precision Floating-Point Values for Unordered (Non-Signaling)
• vcmpunord_ssd — Compare Scalar Double-Precision Floating-Point Values for Unordered (Signaling)
• vcmpunord_sss — Compare Scalar Single-Precision Floating-Point Values for Unordered (Signaling)
• vcmpunordsd — Compare Scalar Double-Precision Floating-Point Values for Unordered
• vcmpunordss — Compare Scalar Single-Precision Floating-Point Values for Unordered

Shuffles, permutes and blends

• vblendpd — Blend Packed Double Precision Floating-Point Values
• vblendps — Blend Packed Single Precision Floating-Point Values
• vblendvpd — Variable Blend Packed Double Precision Floating-Point Values
• vblendvps — Variable Blend Packed Single Precision Floating-Point Values
• vmovhlps — Move Packed Single-Precision Floating-Point Values High to Low
• vmovlhps — Move Packed Single-Precision Floating-Point Values Low to High
• vpblendvb — Variable Blend Packed Bytes
• vpblendw — Blend Packed Words
• vperm2f128 — Permute Floating-Point Values

Broadcast, insert and extract

• vbroadcastf128 — Broadcast 128 Bit of Floating-Point Data
• vextractf128 — Extract Packed Floating-Point Values
• vinsertf128 — Insert Packed Floating-Point Values
• vinsertps — Insert Packed Single Precision Floating-Point Value
• vmovmskpd — Extract Packed Double-Precision Floating-Point Sign Mask
• vmovmskps — Extract Packed Single-Precision Floating-Point Sign Mask
• vpextrd — Extract Doubleword
• vpextrq — Extract Quadword
• vpinsrb — Insert Byte
• vpinsrd — Insert Doubleword
• vpinsrq — Insert Quadword
• vpinsrw — Insert Word
• vpmovmskb — Move Byte Mask

Conversions

• vcvtpd2dq — Convert Packed Double-Precision FP Values to Packed Dword Integers
• vcvtpd2ps — Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values
• vcvtsd2si — Convert Scalar Double-Precision FP Value to Integer
• vcvtsd2ss — Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value
• vcvtsi2sd — Convert Dword Integer to Scalar Double-Precision FP Value
• vcvtsi2ss — Convert Dword Integer to Scalar Single-Precision FP Value
• vcvtss2sd — Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value
• vcvtss2si — Convert Scalar Single-Precision FP Value to Dword Integer
• vcvttpd2dq — Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
• vcvttsd2si — Convert with Truncation Scalar Double-Precision FP Value to Signed Integer
• vcvttss2si — Convert with Truncation Scalar Single-Precision FP Value to Dword Integer
• vroundpd — Round Packed Double Precision Floating-Point Values
• vroundps — Round Packed Single Precision Floating-Point Values
• vroundsd — Round Scalar Double Precision Floating-Point Values
• vroundss — Round Scalar Single Precision Floating-Point Values

Gathers and masked moves

• vmaskmovdqu — Store Selected Bytes of Double Quadword
• vmaskmovpd — Conditional Move Packed Double-Precision Floating-Point Values
• vmaskmovps — Conditional Move Packed Single-Precision Floating-Point Values

String compare

• vpcmpestri — Packed Compare Explicit Length Strings, Return Index
• vpcmpestrm — Packed Compare Explicit Length Strings, Return Mask
• vpcmpistri — Packed Compare Implicit Length Strings, Return Index
• vpcmpistrm — Packed Compare Implicit Length Strings, Return Mask

State and control

• vldmxcsr — Load MXCSR Register
• vstmxcsr — Store MXCSR Register State
• vzeroall — Zero All YMM Registers
• vzeroupper — Zero Upper Bits of YMM Registers

Shuffles, permutes and blends

• vpblendd — Blend Packed Doublewords
• vperm2i128 — Permute 128-Bit Integer Values

Broadcast, insert and extract

• vbroadcasti128 — Broadcast 128 Bits of Integer Data
• vextracti128 — Extract Packed Integer Values
• vinserti128 — Insert Packed Integer Values

Gathers and masked moves

• vpmaskmovd — Conditional Move Packed Doubleword Integers
• vpmaskmovq — Conditional Move Packed Quadword Integers

The AVX-512 and AVX10 forms of these instructions are not supported by this emulator; the other forms run.

• vaddph — Add Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vaddsh — Add Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vcmpph — Compare Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vcmpsh — Compare Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vcomish — Compare Scalar Ordered Half-Precision Floating-Point Values and Set EFLAGS (not supported: AVX-512)
• vcvtdq2ph — Convert Packed Dword Integers to Packed Half-Precision FP Values (not supported: AVX-512)
• vcvtpd2ph — Convert Packed Double-Precision FP Values to Packed Half-Precision FP Values (not supported: AVX-512)
• vcvtph2dq — Convert Packed Half-Precision FP Values to Packed Dword Integers (not supported: AVX-512)
• vcvtph2pd — Convert Packed Half-Precision FP Values to Packed Double-Precision FP Values (not supported: AVX-512)
• vcvtph2ps — Convert Half-Precision FP Values to Single-Precision FP Values
• vcvtph2psx — Convert Half-Precision FP Values to Single-Precision FP Values (not supported: AVX-512)
• vcvtph2qq — Convert packed half-precision floating-point values to packed signed quadword integers (not supported: AVX-512)
• vcvtph2udq — Convert Packed Half-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (not supported: AVX-512)
• vcvtph2uqq — Convert Packed Half Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (not supported: AVX-512)
• vcvtph2uw — Convert Packed Half-Precision Floating-Point Values to Packed Unsigned Word Integer Values (not supported: AVX-512)
• vcvtph2w — Convert Packed Half-Precision Floating-Point Values to Packed Word Integer Values (not supported: AVX-512)
• vcvtps2ph — Convert Single-Precision FP value to Half-Precision FP value
• vcvtps2phx — Convert Single-Precision FP value to Half-Precision FP value (not supported: AVX-512)
• vcvtqq2ph — Convert Packed Quadword Integers to Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vcvtsd2sh — Convert Scalar Double-Precision FP Value to Scalar Half-Precision FP Value (not supported: AVX-512)
• vcvtsh2sd — Convert Scalar Half-Precision FP Value to Scalar Double-Precision FP Value (not supported: AVX-512)
• vcvtsh2si — Convert Scalar Half-Precision FP Value to Dword Integer (not supported: AVX-512)
• vcvtsh2ss — Convert Scalar Half-Precision FP Value to Scalar Double-Precision FP Value (not supported: AVX-512)
• vcvtsh2usi — Convert Scalar Half-Precision Floating-Point Value to Unsigned Doubleword Integer (not supported: AVX-512)
• vcvtsi2sh — Convert Dword Integer to Scalar Half-Precision FP Value (not supported: AVX-512)
• vcvtss2sh — Convert Scalar Single-Precision FP Value to Scalar Half-Precision FP Value (not supported: AVX-512)
• vcvttph2dq — Convert with Truncation Packed Half-Precision FP Values to Packed Dword Integers (not supported: AVX-512)
• vcvttph2qq — Convert packed half-precision floating-point values to packed signed quadword integers with truncation (not supported: AVX-512)
• vcvttph2udq — Convert with Truncation Packed Half-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values (not supported: AVX-512)
• vcvttph2uqq — Convert with Truncation Packed Half Precision Floating-Point Values to Packed Unsigned Quadword Integer Values (not supported: AVX-512)
• vcvttph2uw — Convert with Truncation Packed Half-Precision Floating-Point Values to Packed Unsigned Word Integer Values (not supported: AVX-512)
• vcvttph2w — Convert with Truncation Packed Half-Precision Floating-Point Values to Packed Word Integer Values (not supported: AVX-512)
• vcvttsh2si — Convert with Truncation Scalar Half-Precision FP Value to Dword Integer (not supported: AVX-512)
• vcvttsh2usi — Convert with Truncation Scalar Half-Precision Floating-Point Value to Unsigned Integer (not supported: AVX-512)
• vcvtudq2ph — Convert Packed Unsigned Doubleword Integers to Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vcvtuqq2ph — Convert Packed Unsigned Quadword Integers to Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vcvtusi2sh — Convert Unsigned Integer to Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vcvtuw2ph — Convert Packed Unsigned Word Integers to Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vcvtw2ph — Convert Packed Word Integers to Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vdivph — Divide Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vdivsh — Divide Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vendscaleph (not supported: AVX-512)
• vendscalesh (not supported: AVX-512)
• vfcmaddcph — Fused Conjugate Multiply-Add of Complex Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfcmaddcsh — Fused Conjugate Multiply-Add of Complex Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfcmulcpch (not supported: AVX-512)
• vfcmulcsh — Fused Conjugate Multiply of Complex Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmadd132ph — Fused Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmadd213ph — Fused Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmadd231ph — Fused Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmaddcph — Fused Multiply-Add of Complex Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmaddcsh — Fused Multiply-Add of Complex Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmaddsub132ph — Fused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmaddsub213ph — Fused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmaddsub231ph — Fused Multiply-Alternating Add/Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsub132ph — Fused Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsub213ph — Fused Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsub231ph — Fused Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsubadd132ph — Fused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsubadd213ph — Fused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmsubadd231ph — Fused Multiply-Alternating Subtract/Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfmulcpch (not supported: AVX-512)
• vfmulcsh — Fused Multiply of Complex Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmadd132ph — Fused Negative Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmadd213ph — Fused Negative Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmadd231ph — Fused Negative Multiply-Add of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmsub132ph — Fused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmsub213ph — Fused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfnmsub231ph — Fused Negative Multiply-Subtract of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfpclassph — Test Class of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vfpclasssh — Test Class of Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vgetexpph — Extract Exponents of Packed Half-Precision Floating-Point Values as Half-Precision Floating-Point Values (not supported: AVX-512)
• vgetexpsh — Extract Exponent of Scalar Half-Precision Floating-Point Value as Half-Precision Floating-Point Value (not supported: AVX-512)
• vgetmantph — Extract Normalized Mantissas from Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vgetmantsh — Extract Normalized Mantissa from Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vgetmaxph (not supported: AVX-512)
• vgetmaxsh (not supported: AVX-512)
• vgetminph (not supported: AVX-512)
• vgetminsh (not supported: AVX-512)
• vmovsh — Move Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vmovw — Move Word (not supported: AVX-512 and AVX10)
• vmulph — Multiply Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vmulsh — Fused Multiply Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vpmadd132ph (not supported: AVX-512)
• vpmadd132sh (not supported: AVX-512)
• vpmadd213ph (not supported: AVX-512)
• vpmadd213sh (not supported: AVX-512)
• vpmadd231ph (not supported: AVX-512)
• vpmadd231sh (not supported: AVX-512)
• vpmsub132ph (not supported: AVX-512)
• vpmsub132sh (not supported: AVX-512)
• vpmsub213ph (not supported: AVX-512)
• vpmsub213sh (not supported: AVX-512)
• vpmsub231ph (not supported: AVX-512)
• vpmsub231sh (not supported: AVX-512)
• vpnmadd132sh (not supported: AVX-512)
• vpnmadd213sh (not supported: AVX-512)
• vpnmadd231sh (not supported: AVX-512)
• vpnmsub132sh (not supported: AVX-512)
• vpnmsub213sh (not supported: AVX-512)
• vpnmsub231sh (not supported: AVX-512)
• vrcpph — Compute Approximate Reciprocals of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vrcpsh — Compute Approximate Reciprocal of Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vreduceph — Perform Reduction Transformation on Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vreducesh — Perform Reduction Transformation on a Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vrsqrtph — Compute Reciprocals of Square Roots of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vrsqrtsh — Compute Reciprocal of Square Root of Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vscalefph — Scale Packed Half-Precision Floating-Point Values With Half-Precision Floating-Point Values (not supported: AVX-512)
• vscalefsh — Scale Scalar Half-Precision Floating-Point Value With a Half-Precision Floating-Point Value (not supported: AVX-512)
• vsqrtph — Compute Square Roots of Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vsqrtsh — Compute Square Root of Scalar Half-Precision Floating-Point Value (not supported: AVX-512)
• vsubph — Subtract Packed Half-Precision Floating-Point Values (not supported: AVX-512)
• vsubsh — Subtract Scalar Half-Precision Floating-Point Values (not supported: AVX-512)
• vucomish — Unordered Compare Scalar Half-Precision Floating-Point Values and Set EFLAGS (not supported: AVX-512)

AES and carry-less multiplication

• pclmulhqhqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• pclmulhqlqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• pclmullqhqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• pclmullqlqdq — Carry-Less Quadword Multiplication, the quadwords named by the mnemonic
• pclmulqdq — Carry-Less Quadword Multiplication

• clrssbsy
• endbr32
• endbr64 — END (terminate) BRanch in 64-bit mode
• incsspd
• incsspq
• rdsspd
• rdsspq
• rstorssp
• saveprevssp
• setssbsy
• wrssd
• wrssq
• wrussd
• wrussq

The AVX-512 forms of these instructions are not supported by this emulator; the other forms run.

Fused multiply-add

• vfmadd123pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd123ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmadd123sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd123ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmadd132sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd132ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmadd213sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd213ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmadd231sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd231ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmadd312pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd312ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmadd312sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd312ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmadd321pd — Fused Multiply-Add of Packed Double-Precision Floating-Point Values
• vfmadd321ps — Fused Multiply-Add of Packed Single-Precision Floating-Point Values
• vfmadd321sd — Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfmadd321ss — Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfmaddsub123pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub123ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmaddsub312pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub312ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmaddsub321pd — Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
• vfmaddsub321ps — Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
• vfmsub123pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub123ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsub123sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub123ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsub132sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub132ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsub213sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub213ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsub231sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub231ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsub312pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub312ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsub312sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub312ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsub321pd — Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfmsub321ps — Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfmsub321sd — Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfmsub321ss — Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfmsubadd123pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd123ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfmsubadd312pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd312ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfmsubadd321pd — Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
• vfmsubadd321ps — Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
• vfnmadd123pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd123ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmadd123sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd123ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmadd132sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd132ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmadd213sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd213ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmadd231sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd231ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmadd312pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd312ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmadd312sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd312ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmadd321pd — Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
• vfnmadd321ps — Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
• vfnmadd321sd — Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
• vfnmadd321ss — Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
• vfnmsub123pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub123ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsub123sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub123ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmsub132sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub132ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmsub213sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub213ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmsub231sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub231ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmsub312pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub312ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsub312sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub312ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
• vfnmsub321pd — Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
• vfnmsub321ps — Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
• vfnmsub321sd — Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
• vfnmsub321ss — Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values

The 256-bit AES and carry-less multiplication and AVX-512 forms of these instructions are not supported by this emulator; the other forms run.

AES and carry-less multiplication

• vaesdec — Perform One Round of an AES Decryption Flow
• vaesdeclast — Perform Last Round of an AES Decryption Flow
• vaesenc — Perform One Round of an AES Encryption Flow
• vaesenclast — Perform Last Round of an AES Encryption Flow

• bndcl
• bndcn
• bndcu
• bndldx
• bndmk
• bndmov
• bndstx

• rdpkru
• wrpkru

This emulator does not support the SHA extensions. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• sha1msg1 — Perform an Intermediate Calculation for the Next Four SHA1 Message Doublewords
• sha1msg2 — Perform a Final Calculation for the Next Four SHA1 Message Doublewords
• sha1nexte — Calculate SHA1 State Variable E after Four Rounds
• sha1rnds4 — Perform Four Rounds of SHA1 Operation
• sha256msg1 — Perform an Intermediate Calculation for the Next Four SHA256 Message Doublewords
• sha256msg2 — Perform a Final Calculation for the Next Four SHA256 Message Doublewords
• sha256rnds2 — Perform Two Rounds of SHA256 Operation
• vsha512msg1 — Perform an Intermediate Calculation for the Next Four SHA512 Message Quadwords
• vsha512msg2 — Perform a Final Calculation for the Next Four SHA512 Message Quadwords
• vsha512rnds2 — Perform Two Rounds of SHA512 Operation

• getsec

• encls
• enclu
• enclv

• prefetchwt1 — Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
• xabort
• xbegin
• xend
• xtest

This emulator does not support ADX and APX. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• adcx — Unsigned Integer Addition of Two Operands with Carry Flag
• adox — Unsigned Integer Addition of Two Operands with Overflow Flag

• erets (FRED)
• eretu (FRED)

• fxrstor
• fxrstor64
• fxsave
• fxsave64

This emulator does not support APX. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• jmpabs (APX)

The MMX forms of these instructions are not supported by this emulator; the other forms run.

Moves, loads and stores

• movaps — Move Aligned Packed Single-Precision Floating-Point Values
• movhps — Move High Packed Single-Precision Floating-Point Values
• movlps — Move Low Packed Single-Precision Floating-Point Values
• movntps — Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
• movss — Move Scalar Single-Precision Floating-Point Values
• movups — Move Unaligned Packed Single-Precision Floating-Point Values

Arithmetic

• addps — Add Packed Single-Precision Floating-Point Values
• addss — Add Scalar Single-Precision Floating-Point Values
• divps — Divide Packed Single-Precision Floating-Point Values
• divss — Divide Scalar Single-Precision Floating-Point Values
• mulps — Multiply Packed Single-Precision Floating-Point Values
• mulss — Multiply Scalar Single-Precision Floating-Point Values
• rcpps — Compute Approximate Reciprocals of Packed Single-Precision Floating-Point Values
• rcpss — Compute Approximate Reciprocal of Scalar Single-Precision Floating-Point Values
• rsqrtps — Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
• rsqrtss — Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
• sqrtps — Compute Square Roots of Packed Single-Precision Floating-Point Values
• sqrtss — Compute Square Root of Scalar Single-Precision Floating-Point Value
• subps — Subtract Packed Single-Precision Floating-Point Values
• subss — Subtract Scalar Single-Precision Floating-Point Values

Logic

• andnps — Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values
• andps — Bitwise Logical AND of Packed Single-Precision Floating-Point Values
• orps — Bitwise Logical OR of Single-Precision Floating-Point Values
• xorps — Bitwise Logical XOR for Single-Precision Floating-Point Values

Compare, minimum and maximum

• cmpps — Compare Packed Single-Precision Floating-Point Values
• cmpss — Compare Scalar Single-Precision Floating-Point Values
• comiss — Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
• maxps — Return Maximum Packed Single-Precision Floating-Point Values
• maxss — Return Maximum Scalar Single-Precision Floating-Point Value
• minps — Return Minimum Packed Single-Precision Floating-Point Values
• minss — Return Minimum Scalar Single-Precision Floating-Point Value
• ucomiss — Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS

Compares named by their predicate

• cmpeqps — Compare Packed Single-Precision Floating-Point Values for Equal
• cmpeqss — Compare Scalar Single-Precision Floating-Point Values for Equal
• cmpleps — Compare Packed Single-Precision Floating-Point Values for Less Than or Equal
• cmpless — Compare Scalar Single-Precision Floating-Point Values for Less Than or Equal
• cmpltps — Compare Packed Single-Precision Floating-Point Values for Less Than
• cmpltss — Compare Scalar Single-Precision Floating-Point Values for Less Than
• cmpneqps — Compare Packed Single-Precision Floating-Point Values for Not Equal
• cmpneqss — Compare Scalar Single-Precision Floating-Point Values for Not Equal
• cmpnleps — Compare Packed Single-Precision Floating-Point Values for Not Less Than or Equal
• cmpnless — Compare Scalar Single-Precision Floating-Point Values for Not Less Than or Equal
• cmpnltps — Compare Packed Single-Precision Floating-Point Values for Not Less Than
• cmpnltss — Compare Scalar Single-Precision Floating-Point Values for Not Less Than
• cmpordps — Compare Packed Single-Precision Floating-Point Values for Ordered
• cmpordss — Compare Scalar Single-Precision Floating-Point Values for Ordered
• cmpunordps — Compare Packed Single-Precision Floating-Point Values for Unordered
• cmpunordss — Compare Scalar Single-Precision Floating-Point Values for Unordered

Shuffles, permutes and blends

• movhlps — Move Packed Single-Precision Floating-Point Values High to Low
• movlhps — Move Packed Single-Precision Floating-Point Values Low to High
• shufps — Shuffle Packed Single-Precision Floating-Point Values
• unpckhps — Unpack and Interleave High Packed Single-Precision Floating-Point Values
• unpcklps — Unpack and Interleave Low Packed Single-Precision Floating-Point Values

Broadcast, insert and extract

• movmskps — Extract Packed Single-Precision Floating-Point Sign Mask

Conversions

• cvtpi2ps — Convert Packed Dword Integers to Packed Single-Precision FP Values (not supported: MMX)
• cvtps2pi — Convert Packed Single-Precision FP Values to Packed Dword Integers (not supported: MMX)
• cvtsi2ss — Convert Dword Integer to Scalar Single-Precision FP Value
• cvtss2si — Convert Scalar Single-Precision FP Value to Dword Integer
• cvttps2pi — Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers (not supported: MMX)
• cvttss2si — Convert with Truncation Scalar Single-Precision FP Value to Dword Integer

State and control

• ldmxcsr — Load MXCSR Register
• stmxcsr — Store MXCSR Register State

The APX and the user-mode MSR instructions forms of these instructions are not supported by this emulator.

• bb0_reset
• bb1_reset
• clts
• cpu_read
• cpu_write
• cpuid — CPU Identification
• dmint
• lmsw
• rdm
• rdmsr
• rdmsrlist
• smint
• smintold
• smsw
• umov
• urdmsr (not supported: the user-mode MSR instructions)
• uwrmsr (not supported: the user-mode MSR instructions)
• wrmsr
• wrmsrlist
• wrmsrns

• clflush — Flush Cache Line
• clflushopt — Flush Cache Line Optimized
• clwb — Cache Line Write Back
• clzero — Zero-out 64-bit Cache Line
• invd
• invlpg
• invlpga
• invpcid
• pcommit
• wbinvd
• wbnoinvd

The MMX, AVX-512 and 3DNow! forms of these instructions are not supported by this emulator; the other forms run.

• emms — Exit MMX State
• movd — Move Doubleword
• packssdw — Pack Doublewords into Words with Signed Saturation
• packsswb — Pack Words into Bytes with Signed Saturation
• packuswb — Pack Words into Bytes with Unsigned Saturation
• paddb — Add Packed Byte Integers
• paddd — Add Packed Doubleword Integers
• paddsb — Add Packed Signed Byte Integers with Signed Saturation
• paddsiw (not supported: MMX)
• paddsw — Add Packed Signed Word Integers with Signed Saturation
• paddusb — Add Packed Unsigned Byte Integers with Unsigned Saturation
• paddusw — Add Packed Unsigned Word Integers with Unsigned Saturation
• paddw — Add Packed Word Integers
• pand — Packed Bitwise Logical AND
• pandn — Packed Bitwise Logical AND NOT
• paveb (not supported: MMX)
• pavgusb — Average Packed Byte Integers (not supported: 3DNow!)
• pcmpeqb — Compare Packed Byte Data for Equality
• pcmpeqd — Compare Packed Doubleword Data for Equality
• pcmpeqw — Compare Packed Word Data for Equality
• pcmpgtb — Compare Packed Signed Byte Integers for Greater Than
• pcmpgtd — Compare Packed Signed Doubleword Integers for Greater Than
• pcmpgtw — Compare Packed Signed Word Integers for Greater Than
• pdistib (not supported: MMX)
• pf2id — Packed Floating-Point to Integer Doubleword Converson (not supported: 3DNow!)
• pfacc — Packed Floating-Point Accumulate (not supported: 3DNow!)
• pfadd — Packed Floating-Point Add (not supported: 3DNow!)
• pfcmpeq — Packed Floating-Point Compare for Equal (not supported: 3DNow!)
• pfcmpge — Packed Floating-Point Compare for Greater or Equal (not supported: 3DNow!)
• pfcmpgt — Packed Floating-Point Compare for Greater Than (not supported: 3DNow!)
• pfmax — Packed Floating-Point Maximum (not supported: 3DNow!)
• pfmin — Packed Floating-Point Minimum (not supported: 3DNow!)
• pfmul — Packed Floating-Point Multiply (not supported: 3DNow!)
• pfrcp — Packed Floating-Point Reciprocal Approximation (not supported: 3DNow!)
• pfrcpit1 — Packed Floating-Point Reciprocal Iteration 1 (not supported: 3DNow!)
• pfrcpit2 — Packed Floating-Point Reciprocal Iteration 2 (not supported: 3DNow!)
• pfrsqit1 — Packed Floating-Point Reciprocal Square Root Iteration 1 (not supported: 3DNow!)
• pfrsqrt — Packed Floating-Point Reciprocal Square Root Approximation (not supported: 3DNow!)
• pfsub — Packed Floating-Point Subtract (not supported: 3DNow!)
• pfsubr — Packed Floating-Point Subtract Reverse (not supported: 3DNow!)
• pi2fd — Packed Integer to Floating-Point Doubleword Conversion (not supported: 3DNow!)
• pmachriw (not supported: MMX)
• pmaddwd — Multiply and Add Packed Signed Word Integers
• pmagw (not supported: MMX)
• pmulhriw (not supported: MMX)
• pmulhrwa (not supported: 3DNow!)
• pmulhrwc (not supported: MMX)
• pmulhw — Multiply Packed Signed Word Integers and Store High Result
• pmullw — Multiply Packed Signed Word Integers and Store Low Result
• pmvgezb (not supported: MMX)
• pmvlzb (not supported: MMX)
• pmvnzb (not supported: MMX)
• pmvzb (not supported: MMX)
• por — Packed Bitwise Logical OR
• prefetch — Prefetch Data into Caches
• prefetchw — Prefetch Data into Caches in Anticipation of a Write
• pslld — Shift Packed Doubleword Data Left Logical
• psllq — Shift Packed Quadword Data Left Logical
• psllw — Shift Packed Word Data Left Logical
• psrad — Shift Packed Doubleword Data Right Arithmetic
• psraw — Shift Packed Word Data Right Arithmetic
• psrld — Shift Packed Doubleword Data Right Logical
• psrlq — Shift Packed Quadword Data Right Logical
• psrlw — Shift Packed Word Data Right Logical
• psubb — Subtract Packed Byte Integers
• psubd — Subtract Packed Doubleword Integers
• psubsb — Subtract Packed Signed Byte Integers with Signed Saturation
• psubsiw (not supported: MMX)
• psubsw — Subtract Packed Signed Word Integers with Signed Saturation
• psubusb — Subtract Packed Unsigned Byte Integers with Unsigned Saturation
• psubusw — Subtract Packed Unsigned Word Integers with Unsigned Saturation
• psubw — Subtract Packed Word Integers
• punpckhbw — Unpack and Interleave High-Order Bytes into Words
• punpckhdq — Unpack and Interleave High-Order Doublewords into Quadwords
• punpckhwd — Unpack and Interleave High-Order Words into Doublewords
• punpcklbw — Unpack and Interleave Low-Order Bytes into Words
• punpckldq — Unpack and Interleave Low-Order Doublewords into Quadwords
• punpcklwd — Unpack and Interleave Low-Order Words into Doublewords

The MMX forms of these instructions are not supported by this emulator; the other forms run.

• pxor — Packed Bitwise Logical Exclusive OR
• skinit

SSE4 instructions run only in their v form: a legacy encoding stops the program with SIGILL.

• crc32 — Accumulate CRC32 Value
• pcmpestri — Packed Compare Explicit Length Strings, Return Index (runs only as vpcmpestri)
• pcmpestrm — Packed Compare Explicit Length Strings, Return Mask (runs only as vpcmpestrm)
• pcmpgtq — Compare Packed Data for Greater Than (runs only as vpcmpgtq)
• pcmpistri — Packed Compare Implicit Length Strings, Return Index (runs only as vpcmpistri)
• pcmpistrm — Packed Compare Implicit Length Strings, Return Mask (runs only as vpcmpistrm)
• popcnt — Count of Number of Bits Set to 1

The MMX forms of these instructions are not supported by this emulator; the other forms run.

• maskmovq — Store Selected Bytes of Quadword (not supported: MMX)
• movntq — Store of Quadword Using Non-Temporal Hint (not supported: MMX)
• pavgb — Average Packed Byte Integers
• pavgw — Average Packed Word Integers
• pmaxsw — Maximum of Packed Signed Word Integers
• pmaxub — Maximum of Packed Unsigned Byte Integers
• pminsw — Minimum of Packed Signed Word Integers
• pminub — Minimum of Packed Unsigned Byte Integers
• pmovmskb — Move Byte Mask
• pmulhuw — Multiply Packed Unsigned Word Integers and Store High Result
• psadbw — Compute Sum of Absolute Differences
• pshufw — Shuffle Packed Words (not supported: MMX)

• mulx — Unsigned Multiply Without Affecting Flags (BMI2)

SSE4 instructions run only in their v form: a legacy encoding stops the program with SIGILL. The MMX forms of these instructions are not supported by this emulator; the other forms run.

Moves, loads and stores

• movntdqa — Load Double Quadword Non-Temporal Aligned Hint

Arithmetic

• dppd — Dot Product of Packed Double Precision Floating-Point Values (runs only as vdppd)
• dpps — Dot Product of Packed Single Precision Floating-Point Values (runs only as vdpps)
• mpsadbw — Compute Multiple Packed Sums of Absolute Difference (runs only as vmpsadbw)
• pmuldq — Multiply Packed Signed Doubleword Integers and Store Quadword Result (runs only as vpmuldq)
• pmulld — Multiply Packed Signed Doubleword Integers and Store Low Result

Compare, minimum and maximum

• pcmpeqq — Compare Packed Quadword Data for Equality (runs only as vpcmpeqq)
• phminposuw — Packed Horizontal Minimum of Unsigned Word Integers (runs only as vphminposuw)
• pmaxsb — Maximum of Packed Signed Byte Integers (runs only as vpmaxsb)
• pmaxsd — Maximum of Packed Signed Doubleword Integers (runs only as vpmaxsd)
• pmaxud — Maximum of Packed Unsigned Doubleword Integers (runs only as vpmaxud)
• pmaxuw — Maximum of Packed Unsigned Word Integers (runs only as vpmaxuw)
• pminsb — Minimum of Packed Signed Byte Integers (runs only as vpminsb)
• pminsd — Minimum of Packed Signed Doubleword Integers (runs only as vpminsd)
• pminud — Minimum of Packed Unsigned Doubleword Integers (runs only as vpminud)
• pminuw — Minimum of Packed Unsigned Word Integers (runs only as vpminuw)
• ptest — Packed Logical Compare (runs only as vptest)

Shuffles, permutes and blends

• blendpd — Blend Packed Double Precision Floating-Point Values (runs only as vblendpd)
• blendps — Blend Packed Single Precision Floating-Point Values (runs only as vblendps)
• blendvpd — Variable Blend Packed Double Precision Floating-Point Values (runs only as vblendvpd)
• blendvps — Variable Blend Packed Single Precision Floating-Point Values (runs only as vblendvps)
• packusdw — Pack Doublewords into Words with Unsigned Saturation (runs only as vpackusdw)
• pblendvb — Variable Blend Packed Bytes (runs only as vpblendvb)
• pblendw — Blend Packed Words (runs only as vpblendw)

Broadcast, insert and extract

• extractps — Extract Packed Single Precision Floating-Point Value (runs only as vextractps)
• insertps — Insert Packed Single Precision Floating-Point Value (runs only as vinsertps)
• pextrb — Extract Byte (runs only as vpextrb)
• pextrd — Extract Doubleword (runs only as vpextrd)
• pextrq — Extract Quadword (runs only as vpextrq)
• pextrw — Extract Word
• pinsrb — Insert Byte (runs only as vpinsrb)
• pinsrd — Insert Doubleword (runs only as vpinsrd)
• pinsrq — Insert Quadword (runs only as vpinsrq)

Conversions

• pmovsxbd — Move Packed Byte Integers to Doubleword Integers with Sign Extension (runs only as vpmovsxbd)
• pmovsxbq — Move Packed Byte Integers to Quadword Integers with Sign Extension (runs only as vpmovsxbq)
• pmovsxbw — Move Packed Byte Integers to Word Integers with Sign Extension (runs only as vpmovsxbw)
• pmovsxdq — Move Packed Doubleword Integers to Quadword Integers with Sign Extension (runs only as vpmovsxdq)
• pmovsxwd — Move Packed Word Integers to Doubleword Integers with Sign Extension (runs only as vpmovsxwd)
• pmovsxwq — Move Packed Word Integers to Quadword Integers with Sign Extension (runs only as vpmovsxwq)
• pmovzxbd — Move Packed Byte Integers to Doubleword Integers with Zero Extension (runs only as vpmovzxbd)
• pmovzxbq — Move Packed Byte Integers to Quadword Integers with Zero Extension (runs only as vpmovzxbq)
• pmovzxbw — Move Packed Byte Integers to Word Integers with Zero Extension (runs only as vpmovzxbw)
• pmovzxdq — Move Packed Doubleword Integers to Quadword Integers with Zero Extension (runs only as vpmovzxdq)
• pmovzxwd — Move Packed Word Integers to Doubleword Integers with Zero Extension (runs only as vpmovzxwd)
• pmovzxwq — Move Packed Word Integers to Quadword Integers with Zero Extension (runs only as vpmovzxwq)
• roundpd — Round Packed Double Precision Floating-Point Values (runs only as vroundpd)
• roundps — Round Packed Single Precision Floating-Point Values (runs only as vroundps)
• roundsd — Round Scalar Double Precision Floating-Point Values (runs only as vroundsd)
• roundss — Round Scalar Single Precision Floating-Point Values (runs only as vroundss)

The APX forms of these instructions are not supported by this emulator; the other forms run.

• ccmp (not supported: APX)
• ccmpa (not supported: APX)
• ccmpae (not supported: APX)
• ccmpb (not supported: APX)
• ccmpbe (not supported: APX)
• ccmpc (not supported: APX)
• ccmpe (not supported: APX)
• ccmpf (not supported: APX)
• ccmpg (not supported: APX)
• ccmpge (not supported: APX)
• ccmpl (not supported: APX)
• ccmple (not supported: APX)
• ccmpna (not supported: APX)
• ccmpnae (not supported: APX)
• ccmpnb (not supported: APX)
• ccmpnbe (not supported: APX)
• ccmpnc (not supported: APX)
• ccmpne (not supported: APX)
• ccmpng (not supported: APX)
• ccmpnge (not supported: APX)
• ccmpnl (not supported: APX)
• ccmpnle (not supported: APX)
• ccmpno (not supported: APX)
• ccmpns (not supported: APX)
• ccmpnz (not supported: APX)
• ccmpo (not supported: APX)
• ccmps (not supported: APX)
• ccmpt (not supported: APX)
• ccmpz (not supported: APX)
• ctest (not supported: APX)
• ctesta (not supported: APX)
• ctestae (not supported: APX)
• ctestb (not supported: APX)
• ctestbe (not supported: APX)
• ctestc (not supported: APX)
• cteste (not supported: APX)
• ctestf (not supported: APX)
• ctestg (not supported: APX)
• ctestge (not supported: APX)
• ctestl (not supported: APX)
• ctestle (not supported: APX)
• ctestna (not supported: APX)
• ctestnae (not supported: APX)
• ctestnb (not supported: APX)
• ctestnbe (not supported: APX)
• ctestnc (not supported: APX)
• ctestne (not supported: APX)
• ctestng (not supported: APX)
• ctestnge (not supported: APX)
• ctestnl (not supported: APX)
• ctestnle (not supported: APX)
• ctestno (not supported: APX)
• ctestns (not supported: APX)
• ctestnz (not supported: APX)
• ctesto (not supported: APX)
• ctests (not supported: APX)
• ctestt (not supported: APX)
• ctestz (not supported: APX)
• fwait
• ud0
• ud1
• ud2 — Undefined Instruction
• ud2a
• ud2b
• udb
• xlat
• xlatb — Table Look-up Translation

• hlt
• monitor — Monitor a Linear Address Range
• monitord
• monitorq
• monitorw
• monitorx — Monitor a Linear Address Range with Timeout
• mwait — Monitor Wait
• mwaitx — Monitor Wait with Timeout
• pause — Spin Loop Hint
• tpause — Timed PAUSE
• umonitor — User mode Monitor a Linear Address Range
• umwait — User mode Monitor Wait

Moves, loads and stores

• lddqu — Load Unaligned Integer 128 Bits

Arithmetic

• addsubpd — Packed Double-FP Add/Subtract
• addsubps — Packed Single-FP Add/Subtract
• haddpd — Packed Double-FP Horizontal Add
• haddps — Packed Single-FP Horizontal Add
• hsubpd — Packed Double-FP Horizontal Subtract
• hsubps — Packed Single-FP Horizontal Subtract

Shuffles, permutes and blends

• movddup — Move One Double-FP and Duplicate
• movshdup — Move Packed Single-FP High and Duplicate
• movsldup — Move Packed Single-FP Low and Duplicate

• ptwrite

• aadd — Atomically ADD
• aand — Atomically AND
• aor — Atomically OR
• axor — Atomically XOR

This emulator does not support SM3 and SM4. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vsm3msg1 — Perform Initial Calculation for the Next Four SM3 Message Words
• vsm3msg2 — Perform Final Calculation for the Next Four SM3 Message Words
• vsm3rnds2 — Perform Two Rounds of SM3 Operation

• arpl
• lar
• lds
• les
• lfs
• lgdt
• lgs
• lidt
• lkgs
• lldt
• loadall
• loadall286
• lsl
• lss
• ltr
• rdfsbase — ReaD FS segment BASE
• rdgsbase — ReaD GS segment BASE
• sgdt
• sidt
• sldt
• str
• swapgs
• verr
• verw
• wrfsbase — WRite FS segment BASE
• wrgsbase — WRite GS segment BASE

• pvalidate
• rmpadjust
• vmgexit

This emulator does not support SM3 and SM4. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• vsm4key4 — Perform Four Rounds of SM4 Key Expansion
• vsm4rnds4 — Performs Four Rounds of SM4 Encryption

• rdpid — Read Processor ID
• rdpmc — Read Performance-Monitoring Counter
• rdrand — Read Random Number
• rdseed — Read Random SEED
• rdtsc — Read Time-Stamp Counter
• rdtscp — Read Time-Stamp Counter and Processor ID

This emulator does not support APX. A program that reaches one of these instructions stops with SIGILL, an illegal instruction.

• pop2 (APX)
• pop2p (APX)
• popp (APX)
• push2 (APX)
• push2p (APX)
• pushp (APX)

• lfence — Load Fence
• mfence — Memory Fence
• serialize — Serialize Instruction Execution
• sfence — Store Fence

• rdshr
• rsdc
• rsldt
• rsm
• rsts
• svdc
• svldt
• svts
• wrshr

• hint_nop
• hint_nop0
• hint_nop1
• hint_nop10
• hint_nop11
• hint_nop12
• hint_nop13
• hint_nop14
• hint_nop15
• hint_nop16
• hint_nop17
• hint_nop18
• hint_nop19
• hint_nop2
• hint_nop20
• hint_nop21
• hint_nop22
• hint_nop23
• hint_nop24
• hint_nop25
• hint_nop26
• hint_nop27
• hint_nop28
• hint_nop29
• hint_nop3
• hint_nop30
• hint_nop31
• hint_nop32
• hint_nop33
• hint_nop34
• hint_nop35
• hint_nop36
• hint_nop37
• hint_nop38
• hint_nop39
• hint_nop4
• hint_nop40
• hint_nop41
• hint_nop42
• hint_nop43
• hint_nop44
• hint_nop45
• hint_nop46
• hint_nop47
• hint_nop48
• hint_nop49
• hint_nop5
• hint_nop50
• hint_nop51
• hint_nop52
• hint_nop53
• hint_nop54
• hint_nop55
• hint_nop56
• hint_nop57
• hint_nop58
• hint_nop59
• hint_nop6
• hint_nop60
• hint_nop61
• hint_nop62
• hint_nop63
• hint_nop7
• hint_nop8
• hint_nop9

The MMX forms of these instructions are not supported by this emulator; the other forms run.

Arithmetic

• pabsb — Packed Absolute Value of Byte Integers
• pabsd — Packed Absolute Value of Doubleword Integers
• pabsw — Packed Absolute Value of Word Integers
• phaddd — Packed Horizontal Add Doubleword Integer
• phaddsw — Packed Horizontal Add Signed Word Integers with Signed Saturation
• phaddw — Packed Horizontal Add Word Integers
• phsubd — Packed Horizontal Subtract Doubleword Integers
• phsubsw — Packed Horizontal Subtract Signed Word Integers with Signed Saturation
• phsubw — Packed Horizontal Subtract Word Integers
• pmaddubsw — Multiply and Add Packed Signed and Unsigned Byte Integers
• pmulhrsw — Packed Multiply Signed Word Integers and Store High Result with Round and Scale
• psignb — Packed Sign of Byte Integers
• psignd — Packed Sign of Doubleword Integers
• psignw — Packed Sign of Word Integers

Shuffles, permutes and blends

• palignr — Packed Align Right
• pshufb — Packed Shuffle Bytes

• rolx (BMI2)
• rorx — Rotate Right Logical Without Affecting Flags (BMI2)
• salx (BMI2)
• sarx — Arithmetic Shift Right Without Affecting Flags (BMI2)
• shlx — Logical Shift Left Without Affecting Flags (BMI2)
• shrx — Logical Shift Right Without Affecting Flags (BMI2)

• clui
• senduipi
• stui
• testui
• uiret

• montmul
• xcryptcbc
• xcryptcfb
• xcryptctr
• xcryptecb
• xcryptofb
• xsha1
• xsha256
• xstore

• clgi
• stgi
• vmcall
• vmclear
• vmfunc
• vmlaunch
• vmload
• vmmcall
• vmptrld
• vmptrst
• vmread
• vmresume
• vmrun
• vmsave
• vmwrite
• vmxoff
• vmxon

The MMX and AVX-512 forms of these instructions are not supported by this emulator; the other forms run.

Moves, loads and stores

• movdq2q — Move Quadword from XMM to MMX Technology Register (not supported: MMX)
• movdqa — Move Aligned Double Quadword
• movdqu — Move Unaligned Double Quadword
• movq — Move Quadword
• movq2dq — Move Quadword from MMX Technology to XMM Register (not supported: MMX)

Arithmetic

• paddq — Add Packed Quadword Integers
• pmuludq — Multiply Packed Unsigned Doubleword Integers
• psubq — Subtract Packed Quadword Integers

Shifts

• pslldq — Shift Packed Double Quadword Left Logical
• psrldq — Shift Packed Double Quadword Right Logical

Shuffles, permutes and blends

• pshufd — Shuffle Packed Doublewords
• pshufhw — Shuffle Packed High Words
• pshuflw — Shuffle Packed Low Words
• punpckhqdq — Unpack and Interleave High-Order Quadwords into Double Quadwords
• punpcklqdq — Unpack and Interleave Low-Order Quadwords into Double Quadwords

Broadcast, insert and extract

• pinsrw — Insert Word

Moves, loads and stores

• movntdq — Store Double Quadword Using Non-Temporal Hint
• movnti — Store Doubleword Using Non-Temporal Hint
• movntpd — Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint

Gathers and masked moves

• maskmovdqu — Store Selected Bytes of Double Quadword

The MMX forms of these instructions are not supported by this emulator; the other forms run.

Moves, loads and stores

• movapd — Move Aligned Packed Double-Precision Floating-Point Values
• movhpd — Move High Packed Double-Precision Floating-Point Value
• movlpd — Move Low Packed Double-Precision Floating-Point Value
• movsd — Move Scalar Double-Precision Floating-Point Value
• movupd — Move Unaligned Packed Double-Precision Floating-Point Values

Arithmetic

• addpd — Add Packed Double-Precision Floating-Point Values
• addsd — Add Scalar Double-Precision Floating-Point Values
• divpd — Divide Packed Double-Precision Floating-Point Values
• divsd — Divide Scalar Double-Precision Floating-Point Values
• mulpd — Multiply Packed Double-Precision Floating-Point Values
• mulsd — Multiply Scalar Double-Precision Floating-Point Values
• sqrtpd — Compute Square Roots of Packed Double-Precision Floating-Point Values
• sqrtsd — Compute Square Root of Scalar Double-Precision Floating-Point Value
• subpd — Subtract Packed Double-Precision Floating-Point Values
• subsd — Subtract Scalar Double-Precision Floating-Point Values

Logic

• andnpd — Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
• andpd — Bitwise Logical AND of Packed Double-Precision Floating-Point Values
• orpd — Bitwise Logical OR of Double-Precision Floating-Point Values
• xorpd — Bitwise Logical XOR for Double-Precision Floating-Point Values

Compare, minimum and maximum

• cmppd — Compare Packed Double-Precision Floating-Point Values
• comisd — Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
• maxpd — Return Maximum Packed Double-Precision Floating-Point Values
• maxsd — Return Maximum Scalar Double-Precision Floating-Point Value
• minpd — Return Minimum Packed Double-Precision Floating-Point Values
• minsd — Return Minimum Scalar Double-Precision Floating-Point Value
• ucomisd — Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS

Compares named by their predicate

• cmpeqpd — Compare Packed Double-Precision Floating-Point Values for Equal
• cmpeqsd — Compare Scalar Double-Precision Floating-Point Values for Equal
• cmplepd — Compare Packed Double-Precision Floating-Point Values for Less Than or Equal
• cmplesd — Compare Scalar Double-Precision Floating-Point Values for Less Than or Equal
• cmpltpd — Compare Packed Double-Precision Floating-Point Values for Less Than
• cmpltsd — Compare Scalar Double-Precision Floating-Point Values for Less Than
• cmpneqpd — Compare Packed Double-Precision Floating-Point Values for Not Equal
• cmpneqsd — Compare Scalar Double-Precision Floating-Point Values for Not Equal
• cmpnlepd — Compare Packed Double-Precision Floating-Point Values for Not Less Than or Equal
• cmpnlesd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than or Equal
• cmpnltpd — Compare Packed Double-Precision Floating-Point Values for Not Less Than
• cmpnltsd — Compare Scalar Double-Precision Floating-Point Values for Not Less Than
• cmpordpd — Compare Packed Double-Precision Floating-Point Values for Ordered
• cmpordsd — Compare Scalar Double-Precision Floating-Point Values for Ordered
• cmpunordpd — Compare Packed Double-Precision Floating-Point Values for Unordered
• cmpunordsd — Compare Scalar Double-Precision Floating-Point Values for Unordered

Shuffles, permutes and blends

• shufpd — Shuffle Packed Double-Precision Floating-Point Values
• unpckhpd — Unpack and Interleave High Packed Double-Precision Floating-Point Values
• unpcklpd — Unpack and Interleave Low Packed Double-Precision Floating-Point Values

Broadcast, insert and extract

• movmskpd — Extract Packed Double-Precision Floating-Point Sign Mask

Conversions

• cvtdq2pd — Convert Packed Dword Integers to Packed Double-Precision FP Values
• cvtdq2ps — Convert Packed Dword Integers to Packed Single-Precision FP Values
• cvtpd2dq — Convert Packed Double-Precision FP Values to Packed Dword Integers
• cvtpd2pi — Convert Packed Double-Precision FP Values to Packed Dword Integers (not supported: MMX)
• cvtpd2ps — Convert Packed Double-Precision FP Values to Packed Single-Precision FP Values
• cvtpi2pd — Convert Packed Dword Integers to Packed Double-Precision FP Values (not supported: MMX)
• cvtps2dq — Convert Packed Single-Precision FP Values to Packed Dword Integers
• cvtps2pd — Convert Packed Single-Precision FP Values to Packed Double-Precision FP Values
• cvtsd2si — Convert Scalar Double-Precision FP Value to Integer
• cvtsd2ss — Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP Value
• cvtsi2sd — Convert Dword Integer to Scalar Double-Precision FP Value
• cvtss2sd — Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP Value
• cvttpd2dq — Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
• cvttpd2pi — Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers (not supported: MMX)
• cvttps2dq — Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
• cvttsd2si — Convert with Truncation Scalar Double-Precision FP Value to Signed Integer

The the x87 BCD instructions and 3DNow! forms of these instructions are not supported by this emulator; the other forms run.

• f2xm1
• fabs
• fadd
• faddp
• fbld (not supported: the x87 BCD instructions)
• fbstp (not supported: the x87 BCD instructions)
• fchs
• fclex
• fcmovb
• fcmovbe
• fcmove
• fcmovnb
• fcmovnbe
• fcmovne
• fcmovnu
• fcmovu
• fcom
• fcomi
• fcomip
• fcomp
• fcompp
• fcos
• fdecstp
• fdisi
• fdiv
• fdivp
• fdivr
• fdivrp
• femms — Fast Exit Multimedia State (not supported: 3DNow!)
• feni
• ffree
• ffreep
• fiadd
• ficom
• ficomp
• fidiv
• fidivr
• fild
• fimul
• fincstp
• finit
• fist
• fistp
• fisttp
• fisub
• fisubr
• fld
• fld1
• fldcw
• fldenv
• fldl2e
• fldl2t
• fldlg2
• fldln2
• fldpi
• fldz
• fmul
• fmulp
• fnclex
• fndisi
• fneni
• fninit
• fnop
• fnsave
• fnstcw
• fnstenv
• fnstsw
• fpatan
• fprem
• fprem1
• fptan
• frndint
• frstor
• fsave
• fscale
• fsetpm
• fsin
• fsincos
• fsqrt
• fst
• fstcw
• fstenv
• fstp
• fstsw
• fsub
• fsubp
• fsubr
• fsubrp
• ftst
• fucom
• fucomi
• fucomip
• fucomp
• fucompp
• fxam
• fxch
• fxtract
• fyl2x
• fyl2xp1

• xgetbv — Get Value of Extended Control Register
• xrstor
• xrstor64
• xrstors
• xrstors64
• xsave
• xsave64
• xsavec
• xsavec64
• xsaveopt
• xsaveopt64
• xsaves
• xsaves64
• xsetbv