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shrd

Integer double precision shift right

Shifts the destination right by the given count, filling its top bits from the low bits of the source, which stays unchanged.

386 and later

Intel's reference: SHRD

CFPFAFZFSFDFOF ●●?●●–?
  • ● set from the result
  • ? undefined afterwards
  • – not changed
  • OF Defined only for a count of 1.
  • A count of 0 leaves every flag unchanged. A 16-bit operand shifted by more than 16 leaves every flag undefined.

Forms

Operands

r/m
A general-purpose register or memory location matching the operation’s size, for example rax or qword [rbp-8]. The byte registers ah, bh, ch and dh cannot be used with a REX prefix, including when the memory address uses r8–r15.
reg
A general-purpose register matching the operation’s size, for example al, ax, eax or rax. The byte registers ah, bh, ch and dh cannot be used with a REX prefix, which is required by spl, bpl, sil, dil and r8–r15.
imm8
An 8-bit immediate, -128 to 255. Instructions that sign-extend it to a wider operand interpret the byte as -128 to 127; shift counts do not use this sign extension.

shld shifts left and fills the low end from the source's high end; shrd shifts right and fills the high end from the source's low end. Only the first operand changes. For example, with eax = 0x01234567 and ebx = 0x89abcdef, shld eax, ebx, 4 leaves eax = 0x12345678.

The third operand is an immediate or cl. Its low six bits are used for 64-bit operands and its low five for 16- and 32-bit operands. A masked count of zero leaves the destination and flags unchanged; a count greater than the operand width has an undefined result.

global _start

section .text
_start:
        mov rax, 12
        mov rbx, 5
        mov rcx, 3
        mov rsi, 9

        shrd rax, rbx, 5

        mov rax, 60         ; syscall 60: exit
        xor rdi, rdi
        syscall