Logical Shift Right
shr r/m8, 1 | shr r/m16, 1 | shr r/m32, 1 | shr r/m64, 1 | shr r/m8, cl | shr r/m16, cl | shr r/m32, cl | shr r/m64, cl | shr r/m8, imm8 | shr r/m16, imm8 | shr r/m32, imm8 | shr r/m64, imm8 | shr [reg8], r/m8, 1 | shr [reg16], r/m16, 1 | shr [reg32], r/m32, 1 | shr [reg64], r/m64, 1 | shr [reg8], r/m8, cl | shr [reg16], r/m16, cl | shr [reg32], r/m32, cl | shr [reg64], r/m64, cl | shr [reg8], r/m8, imm8 | shr [reg16], r/m16, imm8 | shr [reg32], r/m32, imm8 | shr [reg64], r/m64, imm8 | shr reg32, r/m32, reg32 | shr reg64, r/m64, reg64 | shr kreg8, kreg8, imm8 | shr kreg16, kreg16, imm8 | shr kreg32, kreg32, imm8 | shr kreg64, kreg64, imm8 SHL and SHR perform a logical shift operation on the given
source/destination (first) operand. The vacated bits are filled with
zero.
A synonym for SHL is SAL (see SAL). NASM will
assemble either one to the same code, but NDISASM will always
disassemble that code as SHL.
The number of bits to shift by is given by the second operand. Only
the bottom five bits of the shift count are considered by processors
above the 8086.
You can force the longer (286 and upwards, beginning with a C1
byte) form of SHL foo,1 by using a BYTE prefix: \c{SHL
foo,BYTE 1}. Similarly with SHR.
