btc

386 and later

Bit Test and Complement

btc r/m16, reg16 | btc r/m32, reg32 | btc r/m64, reg64 | btc r/m16, imm8 | btc r/m32, imm8 | btc r/m64, imm8

These instructions all test one bit of their first operand, whose index is given by the second operand, and store the value of that bit into the carry flag. Bit indices are from 0 (least significant) to 15 or 31 (most significant).

In addition to storing the original value of the bit into the carry flag, BTR also resets (clears) the bit in the operand itself. BTS sets the bit, and BTC complements the bit. BT does not modify its operands.

The destination can be a register or a memory location. The source can be a register or an immediate value.

If the destination operand is a register, the bit offset should be in the range 0-15 (for 16-bit operands) or 0-31 (for 32-bit operands). An immediate value outside these ranges will be taken modulo 16/32 by the processor.

If the destination operand is a memory location, then an immediate bit offset follows the same rules as for a register. If the bit offset is in a register, then it can be anything within the signed range of the register used (ie, for a 32-bit operand, it can be (-2^31) to (2^31 - 1)

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Forms

Every form of btc the assembler accepts, from NASM's own instruction table. The second column is the processor that introduced the form; a badge marks a form that needs an extension, that is lockable, or that long mode dropped.

FormSinceNotes
btc r/m16, reg16386lock
btc r/m32, reg32386lock
btc r/m64, reg64x86-64locklong
btc r/m16, imm8386lock
btc r/m32, imm8386lock
btc r/m64, imm8x86-64locklong