LOOPNEQ - x86-64 instruction reference

loopneqLoop while not equal, rcx as the counter 
Decrements rcx by one and jumps to the short target if the counter is non-zero and ZF is 0.
x86-64 and later
Intel's reference: LOOP/LOOPcc 
CFPFAFZFSFDFOF –––––––
Changes no flag
Reads ZF
Forms  loopneq   
Operands imm8 A branch target, written as a label or address. NASM calculates the displacement from the end of the instruction. The displacement must fit a signed byte, -128 to 127. 
It leaves flags unchanged. A zero initial counter wraps to its maximum value when decremented.
The q suffix explicitly selects the 64-bit counter and address size. This form requires 64-bit mode. The suffix chooses the counter width, not the branch displacement width.
Write a target label or address. NASM calculates a signed 8-bit displacement from the end of the instruction (−128 through 127 bytes). There is no longer near encoding.
 global _start

section .text
_start:
        mov rcx, 5          ; the counter this family reads
        xor rax, rax
again:
        add rax, rcx
        cmp rax, 0          ; the conditional forms read the flags too
        loopneq again       ; jumps while rcx is not zero and the last comparison differed

        mov rax, 60         ; syscall 60: exit
        xor rdi, rdi
        syscall