Logical Inclusive OR
or r/m8, reg8 | or r/m16, reg16 | or r/m32, reg32 | or r/m64, reg64 | or reg8, r/m8 | or reg16, r/m16 | or reg32, r/m32 | or reg64, r/m64 | or r/m16, imm8 | or r/m32, imm8 | or r/m64, imm8 | or al, imm8 | or ax, imm16 | or eax, imm32 | or rax, imm32 | or r/m8, imm8 | or r/m16, imm16 | or r/m32, imm32 | or r/m64, imm32 | or [reg8], reg8, r/m8 | or [reg16], reg16, r/m16 | or [reg32], reg32, r/m32 | or [reg64], reg64, r/m64 | or [reg8], r/m8, reg8 | or [reg16], r/m16, reg16 | or [reg32], r/m32, reg32 | or [reg64], r/m64, reg64 | or [reg16], r/m16, imm8 | or [reg32], r/m32, imm8 | or [reg64], r/m64, imm8 | or [reg8], r/m8, imm8 | or [reg16], r/m16, imm16 | or [reg32], r/m32, imm32 | or [reg64], r/m64, imm32 | or kreg8, kreg8, kreg8 | or kreg16, kreg16, kreg16 | or kreg32, kreg32, kreg32 | or kreg64, kreg64, kreg64 OR performs a bitwise OR operation between its two operands
(i.e. each bit of the result is 1 if and only if at least one of the
corresponding bits of the two inputs was 1), and stores the result
in the destination (first) operand.
In the forms with an 8-bit immediate second operand and a longer
first operand, the second operand is considered to be signed, and is
sign-extended to the length of the first operand. In these cases,
the BYTE qualifier is necessary to force NASM to generate this
form of the instruction.
The MMX instruction POR (see POR) performs the same
operation on the 64-bit MMX registers.
