Logical AND
and r/m8, reg8 | and r/m16, reg16 | and r/m32, reg32 | and r/m64, reg64 | and reg8, r/m8 | and reg16, r/m16 | and reg32, r/m32 | and reg64, r/m64 | and r/m16, imm8 | and r/m32, imm8 | and r/m64, imm8 | and al, imm8 | and ax, imm16 | and eax, imm32 | and rax, imm32 | and r/m8, imm8 | and r/m16, imm16 | and r/m32, imm32 | and r/m64, imm32 | and [reg8], reg8, r/m8 | and [reg16], reg16, r/m16 | and [reg32], reg32, r/m32 | and [reg64], reg64, r/m64 | and [reg8], r/m8, reg8 | and [reg16], r/m16, reg16 | and [reg32], r/m32, reg32 | and [reg64], r/m64, reg64 | and [reg16], r/m16, imm8 | and [reg32], r/m32, imm8 | and [reg64], r/m64, imm8 | and [reg8], r/m8, imm8 | and [reg16], r/m16, imm16 | and [reg32], r/m32, imm32 | and [reg64], r/m64, imm32 | and kreg8, kreg8, kreg8 | and kreg16, kreg16, kreg16 | and kreg32, kreg32, kreg32 | and kreg64, kreg64, kreg64 AND performs a bitwise AND operation between its two operands
(i.e. each bit of the result is 1 if and only if the corresponding
bits of the two inputs were both 1), and stores the result in the
destination (first) operand. The destination operand can be a
register or a memory location. The source operand can be a register,
a memory location or an immediate value.
In the forms with an 8-bit immediate second operand and a longer
first operand, the second operand is considered to be signed, and is
sign-extended to the length of the first operand. In these cases,
the BYTE qualifier is necessary to force NASM to generate this
form of the instruction.
The MMX instruction PAND (see PAND) performs the same
operation on the 64-bit MMX registers.
