JCXZ - x86-64 instruction reference

jcxzJump if cx register is 0 
Jumps a short distance when the selected counter is zero; the cx form is unavailable in 64-bit mode.
8086 and later
Intel's reference: Jcc 
CFPFAFZFSFDFOF –––––––
Changes no flag
Forms  jcxz , ecx   386 and later 
 jcxz , rcx  
Operands imm8 A branch target, written as a label or address. NASM calculates the displacement from the end of the instruction. The displacement must fit a signed byte, -128 to 127. 
jrcxz tests rcx; jecxz tests ecx and uses the 32-bit address size in 64-bit mode. jcxz target tests cx and is unavailable in 64-bit mode because 16-bit addressing is unavailable. NASM also accepts jcxz target, ecx and jcxz target, rcx as explicit-counter aliases for jecxz and jrcxz.
The operand is a target label or address. NASM encodes a signed 8-bit displacement from the end of the instruction, reaching −128 through 127 bytes. There is no longer near encoding for these instructions.