addiw

Operands

reg, reg, imm

Addition immediate: set t1 to (t2 plus signed 12-bit immediate) using only the lower 32 bits (64bit)

Addition immediate: set t1 to (t2 plus signed 12-bit immediate) using only the lower 32 bits (64bit) addiw t1,t2,-100

This example runs on RV64.

.text
li t0, 2147483647
# t0=2147483647, immediate 1; addiw writes -2147483648 (0xFFFFFFFF80000000) to t2.
addiw t2, t0, 1
1
2
3
4