csrc

Operands

reg, csr

Clear bits in control and status register

Variants

Clear bits in control and status register csrc t1, fcsr

# Initialize fcsr to 1, apply csrc with mask 1, then read fcsr into t2 (0).
.text
li t3, 1
csrw t3, fcsr
li t1, 1
csrc t1, fcsr
csrr t2, fcsr
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