mulhsu

Operands

reg, reg, reg

Multiplication: set t1 to the upper 32 bits of t2*t3 where t2 is signed and t3 is unsigned

Variants

  • Multiplication: set t1 to the upper 32 bits of t2*t3 where t2 is signed and t3 is unsigned mulhsu t1,t2,t3
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