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sd

Store double word RV64 only

Stores the 64-bit value of the first register at the address in the second plus an offset.

RISC-V manual: sd

Used in

Forms

  • sd , ()

Pseudo-instructions

The processor does not have these forms. The assembler replaces each of them with one or more real instructions. Open a row to see them.

  • Store to Address

Operands

t1
Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6.
imm12
A signed 12-bit immediate, -2048 to 2047.
t2
An integer register. It may be the same register as t1.
label
A named address in the program, such as the start of a loop or a variable in .data.

This example runs on RV64.

# value is initialized and naturally aligned for this operation.
.data
value: .dword 0
.text
la t0, value
li t1, 42
# Store 42 (bytes 2A 00 00 00 00 00 00 00) at value; inspect Memory.
sd t1, 0(t0)