RORW - RISC-V instruction reference

rorwRotate right word (32-bit) RV64 only
Rotates the low 32 bits of t2 right by the low 5 bits of t3 and sign-extends the result into t1 (RV64 only).
RISC-V manual: rorw 
Forms  rorw , ,   
Operands t1 Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6. 
t2 An integer register. It may be the same register as t1. 
t3 An integer register. It may be the same register as t1. 
This example runs on RV64.
 .text
li t0, 13
li t1, 2
# t0=13, t1=2; rorw writes 1073741827 to t2.
rorw t2, t0, t1