SRLIW: RISC-V instruction reference

srliwShift right logical immediate word (32-bit) RV64 only
Shifts the low 32 bits of the second register right by an immediate amount, filling with zeros, and sign-extends the result into the first.
RISC-V manual: srliw 
Forms  srliw , ,   
Operands t1 Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6. 
t2 An integer register. It may be the same register as t1. 
imm5 An unsigned 5-bit immediate, 0 to 31, used for values such as a shift count or a CSR immediate. 
This example runs on RV64.
 .text
li t0, 13
# t0=13, immediate 2; srliw writes 3 to t2.
srliw t2, t0, 2