clz

Operands

reg, reg

Variants

  • Count leading zeros : Set t1 to the number of 0 bits above the most significant 1 bit of t2, which is the full register width when t2 is zero clz t1,t2

Count leading zeros : Set t1 to the number of 0 bits above the most significant 1 bit of t2, which is the full register width when t2 is zero

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