SRLW: RISC-V instruction reference

srlwShift right logical word (32-bit) RV64 only
Shifts the low 32 bits of the second register right by the amount in the low 5 bits of the third, filling with zeros, and sign-extends into the first.
RISC-V manual: srlw 
Forms  srlw , ,   
Operands t1 Any integer register, x0 to x31, or its named alias, such as zero, t0 or t6. 
t2 An integer register. It may be the same register as t1. 
t3 An integer register. It may be the same register as t1. 
This example runs on RV64.
 .text
li t0, 13
li t1, 2
# t0=13, t1=2; srlw writes 3 to t2.
srlw t2, t0, t1