csrsi

Operands

csr, imm

Set bits in control and status register

Set bits in control and status register csrsi fcsr, 100

# Initialize fcsr to 0; csrsi uses immediate 1 and leaves fcsr=1.
.text
li t3, 0
csrw t3, fcsr
csrsi fcsr, 1
csrr t2, fcsr
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