ctz

Operands

reg, reg

Variants

  • Count trailing zeros : Set t1 to the number of 0 bits below the least significant 1 bit of t2, which is the full register width when t2 is zero ctz t1,t2

Count trailing zeros : Set t1 to the number of 0 bits below the least significant 1 bit of t2, which is the full register width when t2 is zero

Loading...