slliw

Operands

reg, reg, imm

Shift left logical (32 bit): Set t1 to result of shifting t2 left by number of bits specified by immediate (64bit)

Variants

  • Shift left logical (32 bit): Set t1 to result of shifting t2 left by number of bits specified by immediate (64bit) slliw t1,t2,10

This example runs on RV64.

.text
li t0, 13
# t0=13, immediate 2; slliw writes 52 to t2.
slliw t2, t0, 2